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Message-ID: <a4146b5a-a229-4441-b123-d13e72ab4472@kernel.org>
Date: Wed, 20 Nov 2024 14:28:29 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Cc: Krishna chaitanya chundru <quic_krichai@...cinc.com>,
 andersson@...nel.org, Bjorn Helgaas <bhelgaas@...gle.com>,
 Lorenzo Pieralisi <lpieralisi@...nel.org>,
 Krzysztof WilczyƄski <kw@...ux.com>,
 Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Konrad Dybcio <konradybcio@...nel.org>,
 cros-qcom-dts-watchers@...omium.org, Jingoo Han <jingoohan1@...il.com>,
 Bartosz Golaszewski <brgl@...ev.pl>, quic_vbadigan@...cinc.com,
 linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 2/6] arm64: dts: qcom: qcs6490-rb3gen2: Add node for
 qps615

On 20/11/2024 12:03, Dmitry Baryshkov wrote:
>>>  
>>>  &apps_rsc {
>>> @@ -684,6 +708,75 @@ &mdss_edp_phy {
>>>  	status = "okay";
>>>  };
>>>  
>>> +&pcie1_port {
>>> +	pcie@0,0 {
>>> +		compatible = "pci1179,0623";
>>
>> The switch is part of SoC or board? This is confusing, I thought QPS615
>> is the SoC.
> 
> QCS615 is the SoC, QPS615 is a switch.
OK, thanks for confirming. Just to be clear, I understand above as: it
is only the switch, nothing else.

Best regards,
Krzysztof

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