linux-kernel - Re: [PATCH v2] drm/rockchip: vop2: fix rk3588 dp+dsi maxclk verification

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <hmdbq56pv3hzzeewh2vy7khe3zr5yz7loas62antivuq2yl4lm@oyojcydl2u42>
Date: Fri, 22 Nov 2024 19:50:47 +0100
From: Sebastian Reichel <sebastian.reichel@...labora.com>
To: Heiko Stuebner <heiko@...ech.de>
Cc: quentin.schulz@...obroma-systems.com, hjc@...k-chips.com, 
	andy.yan@...k-chips.com, dri-devel@...ts.freedesktop.org, 
	linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org, 
	Heiko Stuebner <heiko.stuebner@...rry.de>, Quentin Schulz <quentin.schulz@...rry.de>, 
	Andy Yan <andyshrk@....com>
Subject: Re: [PATCH v2] drm/rockchip: vop2: fix rk3588 dp+dsi maxclk
 verification

Hi,

On Fri, Nov 15, 2024 at 04:11:31PM +0100, Heiko Stuebner wrote:
> From: Heiko Stuebner <heiko.stuebner@...rry.de>
> 
> The clock is in Hz while the value checked against is in kHz, so
> actual frequencies will never be able to be below to max value.
> Fix this by specifying the max-value in Hz too.
> 
> Fixes: 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588")
> Signed-off-by: Heiko Stuebner <heiko.stuebner@...rry.de>
> Reviewed-by: Quentin Schulz <quentin.schulz@...rry.de>
> Acked-by: Andy Yan<andyshrk@....com>
> ---

Reviewed-by: Sebastian Reichel <sebastian.reichel@...labora.com>
Tested-by: Sebastian Reichel <sebastian.reichel@...labora.com>

-- Sebastian

> changes in v2:
> - drop the separate vp3-config patch, as vp3 will always get the leftover
>   resources, so _should_ be fine (Andy)
> - fix error output to also report Hz for the value in Hz (Quentin)
> - add received Reviews+Acks
> 
>  drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> index 9ad025aa9ab0..0c8ec7220fbe 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> @@ -1864,9 +1864,9 @@ static unsigned long rk3588_calc_cru_cfg(struct vop2_video_port *vp, int id,
>  		else
>  			dclk_out_rate = v_pixclk >> 2;
>  
> -		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000);
> +		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000000);
>  		if (!dclk_rate) {
> -			drm_err(vop2->drm, "DP dclk_out_rate out of range, dclk_out_rate: %ld KHZ\n",
> +			drm_err(vop2->drm, "DP dclk_out_rate out of range, dclk_out_rate: %ld Hz\n",
>  				dclk_out_rate);
>  			return 0;
>  		}
> @@ -1881,9 +1881,9 @@ static unsigned long rk3588_calc_cru_cfg(struct vop2_video_port *vp, int id,
>  		 * dclk_rate = N * dclk_core_rate N = (1,2,4 ),
>  		 * we get a little factor here
>  		 */
> -		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000);
> +		dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000000);
>  		if (!dclk_rate) {
> -			drm_err(vop2->drm, "MIPI dclk out of range, dclk_out_rate: %ld KHZ\n",
> +			drm_err(vop2->drm, "MIPI dclk out of range, dclk_out_rate: %ld Hz\n",
>  				dclk_out_rate);
>  			return 0;
>  		}
> -- 
> 2.45.2
> 

Download attachment "signature.asc" of type "application/pgp-signature" (834 bytes)