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Message-Id: <173223683845.339623.11713825079934765892.b4-ty@codeconstruct.com.au>
Date: Fri, 22 Nov 2024 11:23:58 +1030
From: Andrew Jeffery <andrew@...econstruct.com.au>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, Joel Stanley <joel@....id.au>, 
 Patrick Williams <patrick@...cx.xyz>, Potin Lai <potin.lai.pt@...il.com>
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, 
 linux-aspeed@...ts.ozlabs.org, linux-kernel@...r.kernel.org, 
 Cosmo Chou <cosmo.chou@...ntatw.com>, Potin Lai <potin.lai@...ntatw.com>
Subject: Re: [PATCH 0/2] ARM: dts: aspeed: catalina: revise catalina dts
 file

On Thu, 21 Nov 2024 12:34:03 +0800, Potin Lai wrote:
> Add following patches to fix issues.
> - revise ltc4287 shunt-resistor value
> - remove interrupt of GPIOB4 form all IOEXP
> 
> 

Thanks, I've applied this to be picked up through the BMC tree.

--
Andrew Jeffery <andrew@...econstruct.com.au>


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