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Message-ID: <9a2862c2-4241-44a4-acac-b37fce237ceb@oss.qualcomm.com>
Date: Fri, 22 Nov 2024 14:02:14 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Soutrik Mukhopadhyay <quic_mukhopad@...cinc.com>, andersson@...nel.org,
        konradybcio@...nel.org, robh@...nel.org, krzk+dt@...nel.org,
        conor+dt@...nel.org
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, quic_riteshk@...cinc.com,
        quic_vproddut@...cinc.com, quic_abhinavk@...cinc.com
Subject: Re: [PATCH v5 1/2] arm64: dts: qcom: sa8775p: add DisplayPort device
 nodes

On 21.11.2024 10:14 AM, Soutrik Mukhopadhyay wrote:
> Add device tree nodes for the DPTX0 and DPTX1 controllers
> with their corresponding PHYs found on Qualcomm SA8775P SoC.
> 
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@...cinc.com>
> ---
>  arch/arm64/boot/dts/qcom/sa8775p.dtsi | 218 +++++++++++++++++++++++++-
>  1 file changed, 217 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index f7a9d1684a79..7fd0d89bf7a9 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -3343,6 +3343,25 @@
>  				interrupt-parent = <&mdss0>;
>  				interrupts = <0>;
>  
> +				ports {
> +					#address-cells = <1>;
> +					#size-cells = <0>;
> +
> +					port@0 {
> +						reg = <0>;
> +						dpu_intf0_out: endpoint {

Style: please add a newline between last properties and first subnodes

[...]

> +			mdss0_dp0_phy: phy@...2a00 {
> +				compatible = "qcom,sa8775p-edp-phy";
> +
> +				reg = <0x0 0xaec2a00 0x0 0x200>,

Addresses should be padded to 8 hex digits with leading zeroes

> +				      <0x0 0xaec2200 0x0 0xd0>,
> +				      <0x0 0xaec2600 0x0 0xd0>,
> +				      <0x0 0xaec2000 0x0 0x1c8>;
> +
> +				clocks =<&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_AUX_CLK>,

Missing space after '='

(ditto in other nodes)

Konrad

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