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Message-ID: <20241122132044.30024-1-quic_yrangana@quicinc.com>
Date: Fri, 22 Nov 2024 18:50:42 +0530
From: Yuvaraj Ranganathan <quic_yrangana@...cinc.com>
To: Herbert Xu <herbert@...dor.apana.org.au>,
"David S. Miller"
<davem@...emloft.net>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski
<krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Bjorn Andersson
<andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>
CC: <linux-arm-msm@...r.kernel.org>, <linux-crypto@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<quic_yrangana@...cinc.com>
Subject: [PATCH V2 0/2] Enable Inline crypto engine for QCS8300
Document and add device-tree node to enable Inline crypto engine for QCS8300
This series depends on below patch series:
https://lore.kernel.org/all/20240925-qcs8300_initial_dtsi-v2-0-494c40fa2a42@quicinc.com/ - Reviewed
Changes in v2:
- extend UFS ICE to the full register range
- Link to v1: https://lore.kernel.org/all/20241113043351.2889027-1-quic_yrangana@quicinc.com/
Signed-off-by: Yuvaraj Ranganathan <quic_yrangana@...cinc.com>
---
Yuvaraj Ranganathan (2):
dt-bindings: crypto: ice: document the qcs8300 inline crypto engine
arm64: dts: qcom: qcs8300: enable the inline crypto engine
.../bindings/crypto/qcom,inline-crypto-engine.yaml | 1 +
arch/arm64/boot/dts/qcom/qcs8300.dtsi | 8 ++++++++
2 files changed, 9 insertions(+)
--
2.34.1
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