linux-kernel - Re: [PATCH 4/4] arm64: dts: qcom: x1e80100-hp-x14: dt for HP Omnibook X Laptop 14

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Message-ID: <0455ab38-fd58-4b93-9656-5745c2f62f89@oldschoolsolutions.biz>
Date: Sun, 24 Nov 2024 20:58:09 +0100
From: Jens Glathe <jens.glathe@...schoolsolutions.biz>
To: Krishna Kurapati <quic_kriskura@...cinc.com>,
 Bjorn Andersson <andersson@...nel.org>,
 Konrad Dybcio <konradybcio@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org,
 Douglas Anderson <dianders@...omium.org>,
 Neil Armstrong <neil.armstrong@...aro.org>,
 Jessica Zhang <quic_jesszhan@...cinc.com>,
 Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
 Kalle Valo <kvalo@...nel.org>, David Airlie <airlied@...il.com>,
 Conor Dooley <conor+dt@...nel.org>, Simona Vetter <simona@...ll.ch>,
 Thomas Zimmermann <tzimmermann@...e.de>, Maxime Ripard <mripard@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Rob Herring <robh@...nel.org>
Subject: Re: [PATCH 4/4] arm64: dts: qcom: x1e80100-hp-x14: dt for HP Omnibook
 X Laptop 14


On 24.11.24 16:54, Krishna Kurapati wrote:
>
>
> On 11/24/2024 6:50 PM, Jens Glathe via B4 Relay wrote:
>> From: Jens Glathe <jens.glathe@...schoolsolutions.biz>
>>
> [...]
>
>> +
>> +&usb_mp {
>> +    status = "okay";
>> +};
>> +
>> +&usb_mp_dwc3 {
>> +    phys = <&usb_mp_hsphy0>;
>> +    phy-names = "usb2-0";
>> +};
>> +
>> +&usb_mp_hsphy0 {
>> +    vdd-supply = <&vreg_l2e_0p8>;
>> +    vdda12-supply = <&vreg_l3e_1p2>;
>> +
>> +    phys = <&eusb3_repeater>;
>> +
>> +    status = "okay";
>> +};
>> +
>> +&usb_mp_qmpphy0 {
>> +    vdda-phy-supply = <&vreg_l3e_1p2>;
>> +    vdda-pll-supply = <&vreg_l3c_0p8>;
>> +
>> +    status = "okay";
>> +};
>>
>
> The above QMP MP PHy is unused in the above DWC3 node. If the port is
> only HS capable, please don't enable the QMP node.
>
Oh its the other way round I guess. Thank you for the hint. It should be:

+&usb_mp_dwc3 {
+    phys = <&usb_mp_hsphy0>, <&usb_mp_qmpphy0>;
+    phy-names = "usb2-0", "usb3-0";
+};

The port is USB2 and USB3 capable, and this was the intent. Noted for v2.

with best regards

Jens Glathe