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Message-ID: <e0595933-d503-492d-ae29-aa3afe90b279@gmx.net>
Date: Mon, 25 Nov 2024 19:12:47 +0100
From: Stefan Wahren <wahrenst@....net>
To: Andrea della Porta <andrea.porta@...e.com>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd
<sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Florian Fainelli <florian.fainelli@...adcom.com>,
Broadcom internal kernel review list
<bcm-kernel-feedback-list@...adcom.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof Wilczynski <kw@...ux.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Bjorn Helgaas <bhelgaas@...gle.com>, Linus Walleij
<linus.walleij@...aro.org>, Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>, Bartosz Golaszewski <brgl@...ev.pl>,
Derek Kiernan <derek.kiernan@....com>, Dragan Cvetic
<dragan.cvetic@....com>, Arnd Bergmann <arnd@...db.de>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Saravana Kannan <saravanak@...gle.com>, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-rpi-kernel@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-pci@...r.kernel.org, linux-gpio@...r.kernel.org,
Masahiro Yamada <masahiroy@...nel.org>,
Herve Codina <herve.codina@...tlin.com>,
Luca Ceresoli <luca.ceresoli@...tlin.com>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>, Andrew Lunn <andrew@...n.ch>
Subject: Re: [PATCH v4 02/10] dt-bindings: pinctrl: Add RaspberryPi RP1
gpio/pinctrl/pinmux bindings
Hi Andrea,
Am 24.11.24 um 11:51 schrieb Andrea della Porta:
> Add device tree bindings for the gpio/pin/mux controller that is part of
> the RP1 multi function device, and relative entries in MAINTAINERS file.
>
> Signed-off-by: Andrea della Porta <andrea.porta@...e.com>
> ---
> .../pinctrl/raspberrypi,rp1-gpio.yaml | 193 ++++++++++++++++++
> MAINTAINERS | 2 +
> 2 files changed, 195 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pinctrl/raspberrypi,rp1-gpio.yaml
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/raspberrypi,rp1-gpio.yaml b/Documentation/devicetree/bindings/pinctrl/raspberrypi,rp1-gpio.yaml
> new file mode 100644
> index 000000000000..21923d39c1bc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/raspberrypi,rp1-gpio.yaml
> @@ -0,0 +1,193 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pinctrl/raspberrypi,rp1-gpio.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: RaspberryPi RP1 GPIO/Pinconf/Pinmux Controller submodule
> +
> +maintainers:
> + - Andrea della Porta <andrea.porta@...e.com>
> +
> +description:
> + The RP1 chipset is a Multi Function Device containing, among other
> + sub-peripherals, a gpio/pinconf/mux controller whose 54 pins are grouped
> + into 3 banks.
> + It works also as an interrupt controller for those gpios.
> +
> +properties:
> + compatible:
> + const: raspberrypi,rp1-gpio
> +
> + reg:
> + maxItems: 3
> + description: One reg specifier for each one of the 3 pin banks.
> +
> + '#gpio-cells':
> + description: The first cell is the pin number and the second cell is used
> + to specify the flags (see include/dt-bindings/gpio/gpio.h).
> + const: 2
> +
> + gpio-controller: true
> +
> + gpio-ranges:
> + maxItems: 1
> +
> + gpio-line-names:
> + maxItems: 54
> +
> + interrupts:
> + maxItems: 3
> + description: One interrupt specifier for each one of the 3 pin banks.
> +
> + '#interrupt-cells':
> + description:
> + Specifies the Bank number [0, 1, 2] and Flags as defined in
> + include/dt-bindings/interrupt-controller/irq.h.
> + const: 2
> +
> + interrupt-controller: true
> +
> +patternProperties:
> + "-state$":
> + oneOf:
> + - $ref: "#/$defs/raspberrypi-rp1-state"
> + - patternProperties:
> + "-pins$":
> + $ref: "#/$defs/raspberrypi-rp1-state"
> + additionalProperties: false
> +
> +$defs:
> + raspberrypi-rp1-state:
> + allOf:
> + - $ref: pincfg-node.yaml#
> + - $ref: pinmux-node.yaml#
> +
> + description:
> + Pin controller client devices use pin configuration subnodes (children
> + and grandchildren) for desired pin configuration.
> + Client device subnodes use below standard properties.
> +
> + properties:
> + pins:
> + description:
> + List of gpio pins affected by the properties specified in this
> + subnode.
> + items:
> + pattern: "^gpio([0-9]|[1-5][0-9])$"
> +
> + function:
> + enum: [ alt0, alt1, alt2, alt3, alt4, gpio, alt6, alt7, alt8, none,
> + aaud, dcd0, dpi, dsi0_te_ext, dsi1_te_ext, dsr0, dtr0, gpclk0,
> + gpclk1, gpclk2, gpclk3, gpclk4, gpclk5, i2c0, i2c1, i2c2, i2c3,
> + i2c4, i2c5, i2c6, i2s0, i2s1, i2s2, ir, mic, pcie_clkreq_n,
> + pio, proc_rio, pwm0, pwm1, ri0, sd0, sd1, spi0, spi1, spi2,
> + spi3, spi4, spi5, spi6, spi7, spi8, uart0, uart1, uart2, uart3,
> + uart4, uart5, vbus0, vbus1, vbus2, vbus3 ]
> +
> + description:
> + Specify the alternative function to be configured for the specified
> + pins.
> +
> + bias-disable: true
> + bias-pull-down: true
> + bias-pull-up: true
> + slew-rate:
> + description: 0 is slow slew rate, 1 is fast slew rate
> + enum: [ 0, 1 ]
> + drive-strength:
> + enum: [ 2, 4, 8, 12 ]
according to the driver in patch 4 the following should also be
supported by the hardware:
input-enable, input-schmitt-enable, output-enable, output-low, output-high
> +
> + additionalProperties: false
> +
> +allOf:
> + - $ref: pinctrl.yaml#
> +
> +required:
> + - reg
> + - compatible
> + - '#gpio-cells'
> + - gpio-controller
> + - interrupts
> + - '#interrupt-cells'
> + - interrupt-controller
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/irq.h>
> +
> + rp1 {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + rp1_gpio: pinctrl@...00d0000 {
> + reg = <0xc0 0x400d0000 0x0 0xc000>,
> + <0xc0 0x400e0000 0x0 0xc000>,
> + <0xc0 0x400f0000 0x0 0xc000>;
> + compatible = "raspberrypi,rp1-gpio";
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>,
> + <1 IRQ_TYPE_LEVEL_HIGH>,
> + <2 IRQ_TYPE_LEVEL_HIGH>;
> + gpio-line-names =
> + "ID_SDA", // GPIO0
> + "ID_SCL", // GPIO1
> + "GPIO2", "GPIO3", "GPIO4", "GPIO5", "GPIO6",
> + "GPIO7", "GPIO8", "GPIO9", "GPIO10", "GPIO11",
> + "GPIO12", "GPIO13", "GPIO14", "GPIO15", "GPIO16",
> + "GPIO17", "GPIO18", "GPIO19", "GPIO20", "GPIO21",
> + "GPIO22", "GPIO23", "GPIO24", "GPIO25", "GPIO26",
> + "GPIO27",
> + "PCIE_RP1_WAKE", // GPIO28
> + "FAN_TACH", // GPIO29
> + "HOST_SDA", // GPIO30
> + "HOST_SCL", // GPIO31
> + "ETH_RST_N", // GPIO32
> + "", // GPIO33
> + "CD0_IO0_MICCLK", // GPIO34
> + "CD0_IO0_MICDAT0", // GPIO35
> + "RP1_PCIE_CLKREQ_N", // GPIO36
> + "", // GPIO37
> + "CD0_SDA", // GPIO38
> + "CD0_SCL", // GPIO39
> + "CD1_SDA", // GPIO40
> + "CD1_SCL", // GPIO41
> + "USB_VBUS_EN", // GPIO42
> + "USB_OC_N", // GPIO43
> + "RP1_STAT_LED", // GPIO44
> + "FAN_PWM", // GPIO45
> + "CD1_IO0_MICCLK", // GPIO46
> + "2712_WAKE", // GPIO47
> + "CD1_IO1_MICDAT1", // GPIO48
> + "EN_MAX_USB_CUR", // GPIO49
> + "", // GPIO50
> + "", // GPIO51
> + "", // GPIO52
> + ""; // GPIO53
> +
> + rp1-i2s0-default-state {
> + function = "i2s0";
> + pins = "gpio18", "gpio19", "gpio20", "gpio21";
> + bias-disable;
> + };
> +
> + rp1-uart0-default-state {
> + txd-pins {
> + function = "uart0";
> + pins = "gpio14";
> + bias-disable;
> + };
> +
> + rxd-pins {
> + function = "uart0";
> + pins = "gpio15";
> + bias-pull-up;
> + };
> + };
> + };
> + };
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 75a66e3e34c9..c55d12550246 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -19384,7 +19384,9 @@ RASPBERRY PI RP1 PCI DRIVER
> M: Andrea della Porta <andrea.porta@...e.com>
> S: Maintained
> F: Documentation/devicetree/bindings/clock/raspberrypi,rp1-clocks.yaml
> +F: Documentation/devicetree/bindings/pinctrl/raspberrypi,rp1-gpio.yaml
> F: include/dt-bindings/clock/rp1.h
> +F: include/dt-bindings/misc/rp1.h
>
> RC-CORE / LIRC FRAMEWORK
> M: Sean Young <sean@...s.org>
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