linux-kernel - Re: [PATCH v4 06/10] pinctrl: rp1: Implement RaspberryPi RP1 gpio support

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Message-ID: <0c6fa2cc-3a7e-4db2-bbad-7c19a876937e@gmx.net>
Date: Mon, 25 Nov 2024 19:46:10 +0100
From: Stefan Wahren <wahrenst@....net>
To: Andrea della Porta <andrea.porta@...e.com>,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd
 <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Florian Fainelli <florian.fainelli@...adcom.com>,
 Broadcom internal kernel review list
 <bcm-kernel-feedback-list@...adcom.com>,
 Lorenzo Pieralisi <lpieralisi@...nel.org>,
 Krzysztof Wilczynski <kw@...ux.com>,
 Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
 Bjorn Helgaas <bhelgaas@...gle.com>, Linus Walleij
 <linus.walleij@...aro.org>, Catalin Marinas <catalin.marinas@....com>,
 Will Deacon <will@...nel.org>, Bartosz Golaszewski <brgl@...ev.pl>,
 Derek Kiernan <derek.kiernan@....com>, Dragan Cvetic
 <dragan.cvetic@....com>, Arnd Bergmann <arnd@...db.de>,
 Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
 Saravana Kannan <saravanak@...gle.com>, linux-clk@...r.kernel.org,
 devicetree@...r.kernel.org, linux-rpi-kernel@...ts.infradead.org,
 linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
 linux-pci@...r.kernel.org, linux-gpio@...r.kernel.org,
 Masahiro Yamada <masahiroy@...nel.org>,
 Herve Codina <herve.codina@...tlin.com>,
 Luca Ceresoli <luca.ceresoli@...tlin.com>,
 Thomas Petazzoni <thomas.petazzoni@...tlin.com>, Andrew Lunn <andrew@...n.ch>
Subject: Re: [PATCH v4 06/10] pinctrl: rp1: Implement RaspberryPi RP1 gpio
 support

Hi Andrea,

Am 24.11.24 um 11:51 schrieb Andrea della Porta:
> The RP1 is an MFD supporting a gpio controller and /pinmux/pinctrl.
> Add minimum support for the gpio only portion. The driver is in
> pinctrl folder since upcoming patches will add the pinmux/pinctrl
> support where the gpio part can be seen as an addition.
>
> Signed-off-by: Andrea della Porta <andrea.porta@...e.com>
> Reviewed-by: Linus Walleij <linus.walleij@...aro.org>
> ---
>   MAINTAINERS                   |   1 +
>   drivers/pinctrl/Kconfig       |  11 +
>   drivers/pinctrl/Makefile      |   1 +
>   drivers/pinctrl/pinctrl-rp1.c | 789 ++++++++++++++++++++++++++++++++++
>   4 files changed, 802 insertions(+)
>   create mode 100644 drivers/pinctrl/pinctrl-rp1.c
...
> +
> +static int rp1_pinctrl_probe(struct platform_device *pdev)
> +{
> +	struct regmap *gpio_regmap, *rio_regmap, *pads_regmap;
> +	struct rp1_pinctrl *pc = &rp1_pinctrl_data;
> +	struct device *dev = &pdev->dev;
> +	struct device_node *np = dev->of_node;
> +	struct gpio_irq_chip *girq;
> +	int err, i;
> +
> +	pc->dev = dev;
> +	pc->gpio_chip = rp1_gpio_chip;
> +	pc->gpio_chip.parent = dev;
> +
> +	pc->gpio_base = devm_platform_ioremap_resource(pdev, 0);
> +	if (IS_ERR(pc->gpio_base))
> +		return dev_err_probe(dev, PTR_ERR(pc->gpio_base), "could not get GPIO IO memory\n");
> +
> +	pc->rio_base = devm_platform_ioremap_resource(pdev, 1);
> +	if (IS_ERR(pc->rio_base))
> +		return dev_err_probe(dev, PTR_ERR(pc->rio_base), "could not get RIO IO memory\n");
> +
> +	pc->pads_base = devm_platform_ioremap_resource(pdev, 2);
> +	if (IS_ERR(pc->pads_base))
> +		return dev_err_probe(dev, PTR_ERR(pc->pads_base), "could not get PADS IO memory\n");
> +
> +	gpio_regmap = devm_regmap_init_mmio(dev, pc->gpio_base,
> +					    &rp1_pinctrl_regmap_cfg);
> +	if (IS_ERR(gpio_regmap))
> +		return dev_err_probe(dev, PTR_ERR(gpio_regmap), "could not init GPIO regmap\n");
> +
> +	rio_regmap = devm_regmap_init_mmio(dev, pc->rio_base,
> +					   &rp1_pinctrl_regmap_cfg);
> +	if (IS_ERR(rio_regmap))
> +		return dev_err_probe(dev, PTR_ERR(rio_regmap), "could not init RIO regmap\n");
> +
> +	pads_regmap = devm_regmap_init_mmio(dev, pc->pads_base,
> +					    &rp1_pinctrl_regmap_cfg);
> +	if (IS_ERR(pads_regmap))
> +		return dev_err_probe(dev, PTR_ERR(pads_regmap), "could not init PADS regmap\n");
> +
> +	for (i = 0; i < RP1_NUM_BANKS; i++) {
> +		const struct rp1_iobank_desc *bank = &rp1_iobanks[i];
> +		int j;
> +
> +		for (j = 0; j < bank->num_gpios; j++) {
> +			struct rp1_pin_info *pin =
> +				&pc->pins[bank->min_gpio + j];
> +			int reg_off;
> +
> +			pin->num = bank->min_gpio + j;
> +			pin->bank = i;
> +			pin->offset = j;
> +
> +			reg_off = bank->gpio_offset + pin->offset
> +				  * sizeof(u32) * 2;
Just a nit: the first * belongs in the line above

Except of this:

Reviewed-by: Stefan Wahren <wahrenst@....net>