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Message-ID: <10413094-500f-4044-b4e3-8ce83fee3dbd@quicinc.com>
Date: Mon, 25 Nov 2024 09:44:12 +0800
From: fange zhang <quic_fangez@...cinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
CC: Rob Clark <robdclark@...il.com>,
Abhinav Kumar
<quic_abhinavk@...cinc.com>,
Sean Paul <sean@...rly.run>,
Marijn Suijten
<marijn.suijten@...ainline.org>,
Maarten Lankhorst
<maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>,
Thomas Zimmermann <tzimmermann@...e.de>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
Rob Herring <robh@...nel.org>,
"Krzysztof
Kozlowski" <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
"Krishna
Manikandan" <quic_mkrishn@...cinc.com>,
Bjorn Andersson
<andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>,
"Catalin
Marinas" <catalin.marinas@....com>,
Will Deacon <will@...nel.org>, Li Liu
<quic_lliu6@...cinc.com>,
Xiangxu Yin <quic_xiangxuy@...cinc.com>,
<linux-arm-msm@...r.kernel.org>, <dri-devel@...ts.freedesktop.org>,
<freedreno@...ts.freedesktop.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v3 5/9] drm/msm/dpu: Add SM6150 support
On 2024/11/22 18:07, Dmitry Baryshkov wrote:
> On Fri, Nov 22, 2024 at 05:56:48PM +0800, Fange Zhang wrote:
>> From: Li Liu <quic_lliu6@...cinc.com>
>>
>> Add definitions for the display hardware used on the Qualcomm SM6150
>> platform.
>>
>> Signed-off-by: Li Liu <quic_lliu6@...cinc.com>
>> Signed-off-by: Fange Zhang <quic_fangez@...cinc.com>
>> ---
>> .../gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h | 263 +++++++++++++++++++++
>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 1 +
>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 1 +
>> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1 +
>> 4 files changed, 266 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h
>> new file mode 100644
>> index 0000000000000000000000000000000000000000..e8b7f694b885d69a9bbfaa85b0faf0c7af677a75
>> --- /dev/null
>> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h
>> @@ -0,0 +1,263 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +/*
>> + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
>> + */
>> +
>> +#ifndef _DPU_5_3_SM6150_H
>> +#define _DPU_5_3_SM6150_H
>> +
>> + }, {
>> + .name = "intf_2", .id = INTF_2,
>> + .base = 0x6b000, .len = 0x2c0,
>> + .features = INTF_SC7180_MASK,
>> + .type = INTF_NONE,
>> + .controller_id = 0,
>> + .prog_fetch_lines_worst_case = 24,
>> + .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 28),
>> + .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 29),
>
> Please drop. No need to declare missing blocks.
got it, will remove this block in the next patch
>
> Other than that:
>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
>
>
>> + }, {
>> + .name = "intf_3", .id = INTF_3,
>> + .base = 0x6b800, .len = 0x280,
>> + .features = INTF_SC7180_MASK,
>> + .type = INTF_DP,
>> + .controller_id = MSM_DP_CONTROLLER_1,
>> + .prog_fetch_lines_worst_case = 24,
>> + .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
>> + .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),
>> + },
>> +};
>> +
>
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