linux-kernel - [tip: x86/urgent] x86/mm: Carve out INVLPG inline asm for use by others

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Message-ID: <173253267297.412.14240274224411885362.tip-bot2@tip-bot2>
Date: Mon, 25 Nov 2024 11:04:32 -0000
From: "tip-bot2 for Borislav Petkov (AMD)" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: "Borislav Petkov (AMD)" <bp@...en8.de>, x86@...nel.org,
 linux-kernel@...r.kernel.org
Subject:
 [tip: x86/urgent] x86/mm: Carve out INVLPG inline asm for use by others

The following commit has been merged into the x86/urgent branch of tip:

Commit-ID:     f1d84b59cbb9547c243d93991acf187fdbe9fbe9
Gitweb:        https://git.kernel.org/tip/f1d84b59cbb9547c243d93991acf187fdbe9fbe9
Author:        Borislav Petkov (AMD) <bp@...en8.de>
AuthorDate:    Tue, 19 Nov 2024 12:21:32 +01:00
Committer:     Borislav Petkov (AMD) <bp@...en8.de>
CommitterDate: Mon, 25 Nov 2024 11:28:02 +01:00

x86/mm: Carve out INVLPG inline asm for use by others

No functional changes.

Signed-off-by: Borislav Petkov (AMD) <bp@...en8.de>
Link: https://lore.kernel.org/r/ZyulbYuvrkshfsd2@antipodes
---
 arch/x86/include/asm/tlb.h | 4 ++++
 arch/x86/mm/tlb.c          | 3 ++-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/tlb.h b/arch/x86/include/asm/tlb.h
index 580636c..4d3c9d0 100644
--- a/arch/x86/include/asm/tlb.h
+++ b/arch/x86/include/asm/tlb.h
@@ -34,4 +34,8 @@ static inline void __tlb_remove_table(void *table)
 	free_page_and_swap_cache(table);
 }
 
+static inline void invlpg(unsigned long addr)
+{
+	asm volatile("invlpg (%0)" ::"r" (addr) : "memory");
+}
 #endif /* _ASM_X86_TLB_H */
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index b0d5a64..a2becb8 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -20,6 +20,7 @@
 #include <asm/cacheflush.h>
 #include <asm/apic.h>
 #include <asm/perf_event.h>
+#include <asm/tlb.h>
 
 #include "mm_internal.h"
 
@@ -1140,7 +1141,7 @@ STATIC_NOPV void native_flush_tlb_one_user(unsigned long addr)
 	bool cpu_pcide;
 
 	/* Flush 'addr' from the kernel PCID: */
-	asm volatile("invlpg (%0)" ::"r" (addr) : "memory");
+	invlpg(addr);
 
 	/* If PTI is off there is no user PCID and nothing to flush. */
 	if (!static_cpu_has(X86_FEATURE_PTI))