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Message-ID: <ac44b1ef5fa84e1baa2dd11eefb48f4b@quicinc.com>
Date: Mon, 25 Nov 2024 03:34:51 +0000
From: "Renjiang Han (QUIC)" <quic_renjiang@...cinc.com>
To: "bryan.odonoghue@...aro.org" <bryan.odonoghue@...aro.org>,
Bjorn Andersson
<andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
"Stephen
Boyd" <sboyd@...nel.org>,
Stanimir Varbanov <stanimir.k.varbanov@...il.com>,
"Vikash Garodia (QUIC)" <quic_vgarodia@...cinc.com>,
Mauro Carvalho Chehab
<mchehab@...nel.org>
CC: "linux-arm-msm@...r.kernel.org" <linux-arm-msm@...r.kernel.org>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-media@...r.kernel.org" <linux-media@...r.kernel.org>
Subject: RE: [PATCH 2/2] venus: pm_helpers: Use dev_pm_genpd_set_hwmode to
switch GDSC mode on V4
On Friday, November 22, 2024 8:51 PM, Bryan O'Donoghue wrote:
> On 22/11/2024 10:31, Renjiang Han wrote:
> > - if (IS_V6(core))
> > + if (IS_V6(core) || IS_V4(core))
> sdm845 IS_V4()
> The GDSCs for the clock OTOH are
> static struct gdsc vcodec0_gdsc = {
> .gdscr = 0x874,
> .pd = {
> .name = "vcodec0_gdsc",
> },
> .cxcs = (unsigned int []){ 0x890, 0x930 },
> .cxc_count = 2,
> .flags = HW_CTRL | POLL_CFG_GDSCR,
> .pwrsts = PWRSTS_OFF_ON,
> };
> static struct gdsc vcodec1_gdsc = {
> .gdscr = 0x8b4,
> .pd = {
> .name = "vcodec1_gdsc",
> },
> .cxcs = (unsigned int []){ 0x8d0, 0x950 },
> .cxc_count = 2,
> .flags = HW_CTRL | POLL_CFG_GDSCR,
> .pwrsts = PWRSTS_OFF_ON,
> };
> I can't see how this series will work on 845.
Thanks for your review. In [PATCH 1/2] clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's, the gdsc flag will be changed to HW_CTRL_TRIGGER, so the v4 core also needs to use the method of switching GDSC mode like v6.
> ---
> bod
Best Regards,
Renjiang
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