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Message-ID: <f65f0a22-1214-4fad-960c-24a75b81a22b@collabora.com>
Date: Mon, 25 Nov 2024 15:30:54 +0100
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Rob Herring <robh@...nel.org>
Cc: chunkuang.hu@...nel.org, p.zabel@...gutronix.de, airlied@...il.com,
simona@...ll.ch, maarten.lankhorst@...ux.intel.com, mripard@...nel.org,
tzimmermann@...e.de, krzk+dt@...nel.org, conor+dt@...nel.org,
matthias.bgg@...il.com, ck.hu@...iatek.com, dri-devel@...ts.freedesktop.org,
linux-mediatek@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
kernel@...labora.com
Subject: Re: [PATCH v1 1/7] dt-bindings: display: mediatek: Add binding for
HDMIv2 DDC
Il 21/11/24 22:02, Rob Herring ha scritto:
> On Wed, Nov 20, 2024 at 01:45:06PM +0100, AngeloGioacchino Del Regno wrote:
>> Add a binding for the Display Data Channel (DDC) IP in MediaTek
>> SoCs with version 2 HDMI TX IP.
>>
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
>> ---
>> .../mediatek/mediatek,mt8195-hdmi-ddc.yaml | 41 +++++++++++++++++++
>> 1 file changed, 41 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml
>> new file mode 100644
>> index 000000000000..d85e8ed2ffa7
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml
>> @@ -0,0 +1,41 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: MediaTek HDMI Display Data Channel (DDC) v2
>> +
>> +maintainers:
>> + - AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
>> + - CK Hu <ck.hu@...iatek.com>
>> +
>> +properties:
>> + compatible:
>> + oneOf:
>> + - const: mediatek,mt8195-hdmi-ddc
>> + - items:
>> + - const: mediatek,mt8188-hdmi-ddc
>> + - const: mediatek,mt8195-hdmi-ddc
>> +
>> + clocks:
>> + maxItems: 1
>> +
>> + power-domains:
>> + maxItems: 1
>> +
>> +required:
>> + - compatible
>> + - clocks
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + hdmi {
>> + hdmi_ddc: i2c {
>> + compatible = "mediatek,mt8195-hdmi-ddc";
>> + clocks = <&clk26m>;
>
> Is this really a separate block? Doesn't really look like it. You don't
> even have registers to interact with it.
>
MTK DDCv2, subnode of HDMI, uses registers from the iospace of its parent, so,
from the HDMI controller.
That one is a separate block, it's just that some of its registers are mixed inside
of the register space of the HDMI controller itself... MediaTek likes to do that a
lot... in this case, that is because of some hotplug detection bits (and some MCU
related ones too) being shared between the DDC controller and the HDMI one, but
then - apart from that - the DDC controller is the DDC controller and the HDMI one
is... the HDMI one. :-)
Cheers,
Angelo
>> + };
>> + };
>> +...
>> --
>> 2.47.0
>>
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