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Message-ID: <20241126125556.oncvvkyrwj5s7u65@thinkpad>
Date: Tue, 26 Nov 2024 18:25:56 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: Neil Armstrong <neil.armstrong@...aro.org>
Cc: Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof Wilczyński <kw@...ux.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>,
linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/3] arm64: dts: qcom: sm8550: Add 'global' interrupt to
the PCIe RC nodes
On Tue, Nov 26, 2024 at 11:22:50AM +0100, Neil Armstrong wrote:
> Qcom PCIe RC controllers are capable of generating 'global' SPI interrupt
> to the host CPUs. This interrupt can be used by the device driver to
> identify events such as PCIe link specific events, safety events, etc...
>
> Hence, add it to the PCIe RC node along with the existing MSI interrupts.
>
> Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
- Mani
> ---
> arch/arm64/boot/dts/qcom/sm8550.dtsi | 12 ++++++++----
> 1 file changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> index 9dc0ee3eb98f8711e01934e47331b99e3bb73682..44613fbe0c7f352ea0499782ca825cbe2a257aab 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> @@ -1734,7 +1734,8 @@ pcie0: pcie@...0000 {
> <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
> + <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "msi0",
> "msi1",
> "msi2",
> @@ -1742,7 +1743,8 @@ pcie0: pcie@...0000 {
> "msi4",
> "msi5",
> "msi6",
> - "msi7";
> + "msi7",
> + "global";
> #interrupt-cells = <1>;
> interrupt-map-mask = <0 0 0 0x7>;
> interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
> @@ -1850,7 +1852,8 @@ pcie1: pcie@...8000 {
> <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
> + <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "msi0",
> "msi1",
> "msi2",
> @@ -1858,7 +1861,8 @@ pcie1: pcie@...8000 {
> "msi4",
> "msi5",
> "msi6",
> - "msi7";
> + "msi7",
> + "global";
> #interrupt-cells = <1>;
> interrupt-map-mask = <0 0 0 0x7>;
> interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
>
> --
> 2.34.1
>
--
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