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Message-ID: <20241126-pastrami-gusty-8b9df32ae00c@spud>
Date: Tue, 26 Nov 2024 17:44:14 +0000
From: Conor Dooley <conor@...nel.org>
To: Heiko Stuebner <heiko@...ech.de>
Cc: vkoul@...nel.org, kishon@...nel.org, robh@...nel.org,
	krzk+dt@...nel.org, conor+dt@...nel.org, quentin.schulz@...rry.de,
	sebastian.reichel@...labora.com, linux-phy@...ts.infradead.org,
	devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
	dse@...umatec.com, Heiko Stuebner <heiko.stuebner@...rry.de>
Subject: Re: [PATCH v4 1/2] dt-bindings: phy: Add Rockchip MIPI C-/D-PHY
 schema

On Tue, Nov 26, 2024 at 02:17:34PM +0100, Heiko Stuebner wrote:
> From: Heiko Stuebner <heiko.stuebner@...rry.de>
> 
> Add dt-binding schema for the MIPI C-/D-PHY found on
> Rockchip RK3588 SoCs.
> 
> Tested-by: Daniel Semkowicz <dse@...umatec.com>
> Tested-by: Sebastian Reichel <sebastian.reichel@...labora.com>
> Signed-off-by: Heiko Stuebner <heiko.stuebner@...rry.de>
> ---
>  .../phy/rockchip,rk3588-mipi-dcphy.yaml       | 87 +++++++++++++++++++
>  1 file changed, 87 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/phy/rockchip,rk3588-mipi-dcphy.yaml
> 
> diff --git a/Documentation/devicetree/bindings/phy/rockchip,rk3588-mipi-dcphy.yaml b/Documentation/devicetree/bindings/phy/rockchip,rk3588-mipi-dcphy.yaml
> new file mode 100644
> index 000000000000..c8ff5ba22a86
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/rockchip,rk3588-mipi-dcphy.yaml
> @@ -0,0 +1,87 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/rockchip,rk3588-mipi-dcphy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip MIPI D-/C-PHY with Samsung IP block
> +
> +maintainers:
> +  - Guochun Huang <hero.huang@...k-chips.com>
> +  - Heiko Stuebner <heiko@...ech.de>
> +
> +properties:
> +  compatible:
> +    enum:
> +      - rockchip,rk3576-mipi-dcphy
> +      - rockchip,rk3588-mipi-dcphy

How many phys do each of these SoCs have?

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