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Message-ID: <dc44ae50-4113-4538-83ac-e3cb422ee53b@quicinc.com>
Date: Wed, 27 Nov 2024 15:35:49 +0800
From: Yongxing Mou <quic_yongmou@...cinc.com>
To: Krzysztof Kozlowski <krzk@...nel.org>,
Ritesh Kumar
<quic_riteshk@...cinc.com>,
Rob Clark <robdclark@...il.com>,
Dmitry Baryshkov
<dmitry.baryshkov@...aro.org>,
Sean Paul <sean@...rly.run>,
Marijn Suijten
<marijn.suijten@...ainline.org>,
Maarten Lankhorst
<maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>,
Thomas Zimmermann <tzimmermann@...e.de>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
Rob Herring <robh@...nel.org>,
"Krzysztof
Kozlowski" <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
"Neil
Armstrong" <neil.armstrong@...aro.org>,
Bjorn Andersson
<andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>
CC: Abhinav Kumar <quic_abhinavk@...cinc.com>, <linux-arm-msm@...r.kernel.org>,
<dri-devel@...ts.freedesktop.org>, <freedreno@...ts.freedesktop.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/5] dt-bindings: display/msm: Document MDSS on QCS8300
On 2024/11/27 15:15, Krzysztof Kozlowski wrote:
> On 27/11/2024 08:05, Yongxing Mou wrote:
>> Document the MDSS hardware found on the Qualcomm QCS8300 platform.
>>
>> Signed-off-by: Yongxing Mou <quic_yongmou@...cinc.com>
>
>
> Will fail testing, so only limited review.
>
Thanks for reviewing,will fix it in next patchset.
>> +examples:
>> + - |
>> + #include <dt-bindings/interconnect/qcom,icc.h>
>> + #include <dt-bindings/interrupt-controller/arm-gic.h>
>> + #include <dt-bindings/clock/qcom,qcs8300-gcc.h>
>> + #include <dt-bindings/clock/qcom,sa8775p-dispcc.h>
>> + #include <dt-bindings/interconnect/qcom,qcs8300-rpmh.h>
>> + #include <dt-bindings/power/qcom,rpmhpd.h>
>> + #include <dt-bindings/power/qcom-rpmpd.h>
>> +
>> + mdss: display-subsystem@...0000 {
>> + compatible = "qcom,qcs8300-mdss";
>> + reg = <0 0x0ae00000 0 0x1000>;
>> + reg-names = "mdss";
>> +
>> + interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ACTIVE_ONLY
>> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
>> + <&mmss_noc MASTER_MDP1 QCOM_ICC_TAG_ACTIVE_ONLY
>> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
>> + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
>> + &config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY>;
>> + interconnect-names = "mdp0-mem",
>> + "mdp1-mem",
>> + "cpu-cfg";
>> +
>> + power-domains = <&dispcc0 MDSS_DISP_CC_MDSS_CORE_GDSC>;
>> +
>> + clocks = <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>,
>> + <&gcc GCC_DISP_HF_AXI_CLK>,
>> + <&dispcc0 MDSS_DISP_CC_MDSS_MDP_CLK>;
>> +
>> + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>> +
>> + iommus = <&apps_smmu 0x1000 0x402>;
>> +
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + ranges;
>> +
>> + status = "disabled";
>
> No, your code cannot be disabled.
>
Thanks, will remove it.
>> +
>> + mdss_mdp: display-controller@...1000 {
>> + compatible = "qcom,qcs8300-dpu";
>> + reg = <0 0x0ae01000 0 0x8f000>,
>> + <0 0x0aeb0000 0 0x2008>;
>> + reg-names = "mdp", "vbif";
>> +
>> + clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
>> + <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>,
>> + <&dispcc0 MDSS_DISP_CC_MDSS_MDP_LUT_CLK>,
>> + <&dispcc0 MDSS_DISP_CC_MDSS_MDP_CLK>,
>> + <&dispcc0 MDSS_DISP_CC_MDSS_VSYNC_CLK>;
>> + clock-names = "bus",
>> + "iface",
>> + "lut",
>> + "core",
>> + "vsync";
>> +
>> + assigned-clocks = <&dispcc0 MDSS_DISP_CC_MDSS_VSYNC_CLK>;
>> + assigned-clock-rates = <19200000>;
>> + operating-points-v2 = <&mdp_opp_table>;
>> + power-domains = <&rpmhpd RPMHPD_MMCX>;
>> +
>> + interrupt-parent = <&mdss>;
>> + interrupts = <0>;
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + port@0 {
>> + reg = <0>;
>> + dpu_intf0_out: endpoint {
>> + remote-endpoint = <&mdss_dp0_in>;
>> + };
>> + };
>> + };
>> +
>> + mdp_opp_table: opp-table {
>> + compatible = "operating-points-v2";
>> +
>> + opp-375000000 {
>> + opp-hz = /bits/ 64 <375000000>;
>> + required-opps = <&rpmhpd_opp_svs_l1>;
>> + };
>> +
>> + opp-500000000 {
>> + opp-hz = /bits/ 64 <500000000>;
>> + required-opps = <&rpmhpd_opp_nom>;
>> + };
>> +
>> + opp-575000000 {
>> + opp-hz = /bits/ 64 <575000000>;
>> + required-opps = <&rpmhpd_opp_turbo>;
>> + };
>> +
>> + opp-650000000 {
>> + opp-hz = /bits/ 64 <650000000>;
>> + required-opps = <&rpmhpd_opp_turbo_l1>;
>> + };
>> + };
>> + };
>> +
>> + mdss_dp0: displayport-controller@...4000 {
>> + compatible = "qcom,qcs8300-dp";
>> +
>> + pinctrl-0 = <&dp_hot_plug_det>;
>> + pinctrl-names = "default";
>> +
>> + reg = <0 0xaf54000 0 0x104>,
>> + <0 0xaf54200 0 0x0c0>,
>> + <0 0xaf55000 0 0x770>,
>> + <0 0xaf56000 0 0x09c>;
>> +
>> + interrupt-parent = <&mdss>;
>> + interrupts = <12>;
>> + clocks = <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>,
>> + <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_AUX_CLK>,
>
> Messed alignment in multiple places.
>
Thanks, will fix it in next patchset.
>> + <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_LINK_CLK>,
>> + <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
>> + <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
>> + clock-names = "core_iface",
>> + "core_aux",
>> + "ctrl_link",
>> + "ctrl_link_iface",
>> + "stream_pixel";
>> + assigned-clocks = <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
>> + <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
>> + assigned-clock-parents = <&mdss_edp_phy 0>, <&mdss_edp_phy 1>;
>> + phys = <&mdss_edp_phy>;
>> + phy-names = "dp";
>> + operating-points-v2 = <&dp_opp_table>;
>> + power-domains = <&rpmhpd RPMHPD_MMCX>;
>> +
>> + #sound-dai-cells = <0>;
>> + status = "disabled";
>
> No, your code cannot be disabled.
>
Got it. will remove it.
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> + reg = <0>;
>> + mdss_dp0_in: endpoint {
>> + remote-endpoint = <&dpu_intf0_out>;
>> + };
>> + };
>> +
>> + port@1 {
>> + reg = <1>;
>> + mdss_dp_out: endpoint { };
>> + };
>> + };
>> +
>> + dp_opp_table: opp-table {
>> + compatible = "operating-points-v2";
>> +
>> + opp-160000000 {
>> + opp-hz = /bits/ 64 <160000000>;
>> + required-opps = <&rpmhpd_opp_low_svs>;
>> + };
>> +
>> + opp-270000000 {
>> + opp-hz = /bits/ 64 <270000000>;
>> + required-opps = <&rpmhpd_opp_svs>;
>> + };
>> +
>> + opp-540000000 {
>> + opp-hz = /bits/ 64 <540000000>;
>> + required-opps = <&rpmhpd_opp_svs_l1>;
>> + };
>> +
>> + opp-810000000 {
>> + opp-hz = /bits/ 64 <810000000>;
>> + required-opps = <&rpmhpd_opp_nom>;
>> + };
>> + };
>> +
>
> Drop stray blank lines.
>
Got it.will fix this issue,there should be a '}'.
>> + };
>> +...
>>
>
>
> Best regards,
> Krzysztof
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