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Message-ID: <67e55b1f18f2a676b890c9a4133575e8b90f6019.camel@phytec.de>
Date: Wed, 27 Nov 2024 10:34:20 +0000
From: Teresa Remmet <T.Remmet@...tec.de>
To: "kernel@...gutronix.de" <kernel@...gutronix.de>, Andrej Picej
<andrej.picej@...ik.com>, "s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
"robh@...nel.org" <robh@...nel.org>, "shawnguo@...nel.org"
<shawnguo@...nel.org>, "krzk+dt@...nel.org" <krzk+dt@...nel.org>,
"festevam@...il.com" <festevam@...il.com>, "conor+dt@...nel.org"
<conor+dt@...nel.org>
CC: "imx@...ts.linux.dev" <imx@...ts.linux.dev>, PHYTEC Upstream
<upstream@...ts.phytec.de>, "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>, "linux-kernel@...r.kernel.org"
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<devicetree@...r.kernel.org>
Subject: Re: [Upstream] [PATCH 09/15] arm64: dts: imx8mm: move bulk of rtc
properties to carrierboards
Hello Andrej,
Am Montag, dem 25.11.2024 um 09:18 +0100 schrieb Andrej Picej:
> From: Yannic Moog <y.moog@...tec.de>
>
> Move properties from SoM's dtsi to carrierboard's dts as they are
> actually defined by the carrier board design.
>
> Signed-off-by: Yannic Moog <y.moog@...tec.de>
> Signed-off-by: Andrej Picej <andrej.picej@...ik.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts | 4 ++++
> arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi | 4 ----
> arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts | 4 ++++
> 3 files changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-
> rdk.dts b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts
> index 7aaf705c7e47..f5f503c3c6b9 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts
> @@ -221,6 +221,10 @@ &pcie_phy {
>
> /* RTC */
> &rv3028 {
> + interrupt-parent = <&gpio1>;
> + interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
> + pinctrl-0 = <&pinctrl_rtc>;
You should also move the pinctrl settings to the carrier boards.
As the pin can be used differently and should not be defined by the
SoM.
Thanks,
Teresa
> + pinctrl-names = "default";
> aux-voltage-chargeable = <1>;
> trickle-resistor-ohms = <3000>;
> wakeup-source;
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi
> index cced82226c6d..fdfe28780d6f 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi
> @@ -301,10 +301,6 @@ eeprom@51 {
> /* RTC */
> rv3028: rtc@52 {
> compatible = "microcrystal,rv3028";
> - interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
> - interrupt-parent = <&gpio1>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_rtc>;
> reg = <0x52>;
> };
> };
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts
> b/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts
> index c9bf4ac254bb..b7b18d5a4f68 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts
> @@ -215,6 +215,10 @@ &pwm4 {
>
> /* RTC */
> &rv3028 {
> + interrupt-parent = <&gpio1>;
> + interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
> + pinctrl-0 = <&pinctrl_rtc>;
> + pinctrl-names = "default";
> aux-voltage-chargeable = <1>;
> trickle-resistor-ohms = <3000>;
> wakeup-source;
--
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