linux-kernel - Re: [PATCH 1/4] arm64: dts: qcom: x1e80100: Add PCIe lane equalization preset properties

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Message-ID: <9ff459ed-4491-4bd4-1402-622d9c31cb71@quicinc.com>
Date: Wed, 27 Nov 2024 07:12:16 +0530
From: Krishna Chaitanya Chundru <quic_krichai@...cinc.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>, <quic_mrana@...cinc.com>,
        <quic_vbadigan@...cinc.com>, <kernel@...cinc.com>,
        Bjorn Andersson
	<andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring
	<robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
	<conor+dt@...nel.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Jingoo Han
	<jingoohan1@...il.com>,
        Manivannan Sadhasivam
	<manivannan.sadhasivam@...aro.org>,
        Lorenzo Pieralisi
	<lpieralisi@...nel.org>,
        Krzysztof Wilczyński <kw@...ux.com>
CC: <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-pci@...r.kernel.org>
Subject: Re: [PATCH 1/4] arm64: dts: qcom: x1e80100: Add PCIe lane
 equalization preset properties



On 11/16/2024 4:49 PM, Konrad Dybcio wrote:
> On 16.11.2024 2:37 AM, Krishna chaitanya chundru wrote:
>> Add PCIe lane equalization preset properties for 8 GT/s and 16 GT/s data
>> rates used in lane equalization procedure.
>>
>> Signed-off-by: Krishna chaitanya chundru <quic_krichai@...cinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/x1e80100.dtsi | 8 ++++++++
>>   1 file changed, 8 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
>> index a36076e3c56b..6a2074297030 100644
>> --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
>> @@ -2993,6 +2993,10 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
>>   			phys = <&pcie6a_phy>;
>>   			phy-names = "pciephy";
>>   
>> +			eq-presets-8gts = /bits/ 16 <0x5555 0x5555>;
> 
> If we make all of these presets u8 arrays, we can use the:
> 
> property = [0xff 0xff 0xff 0xff];
> 
> syntax
> 
> Konrad
we can't make the property as u8 as each index represents single lane
and for 8 GT/s data rates each value needs 16bits. So for 8 GT/s we have
to use u16 array only.

- Krishna Chaitanya.