linux-kernel - Re: [PATCH v4 2/3] arm64: dts: qcom: sar2130p: add support for SAR2130P

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Message-ID: <2hka5j3iyml32czhv6k2gr6ss2jthsgaljva5izhzzcoc3l4eq@slsmyp7s6ars>
Date: Wed, 27 Nov 2024 16:02:50 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Krishna Kurapati <quic_kriskura@...cinc.com>
Cc: Bjorn Andersson <andersson@...nel.org>, linux-arm-msm@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, Conor Dooley <conor+dt@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Rob Herring <robh@...nel.org>, 
	Konrad Dybcio <konradybcio@...nel.org>
Subject: Re: [PATCH v4 2/3] arm64: dts: qcom: sar2130p: add support for
 SAR2130P

On Tue, Nov 26, 2024 at 11:32:59PM +0530, Krishna Kurapati wrote:
> 
> 
> On 11/2/2024 8:33 AM, Dmitry Baryshkov wrote:
> > Add DT file for the Qualcomm SAR2130P platform.
> > 
> > Co-developed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
> > Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> > ---
> >   arch/arm64/boot/dts/qcom/sar2130p.dtsi | 3123 ++++++++++++++++++++++++++++++++
> >   1 file changed, 3123 insertions(+)
> > 
> 
> [...]
> 
> > +		usb_dp_qmpphy: phy@...8000 {
> > +			compatible = "qcom,sar2130p-qmp-usb3-dp-phy";
> > +			reg = <0x0 0x088e8000 0x0 0x3000>;
> > +
> > +			clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
> > +				 <&rpmhcc RPMH_CXO_CLK>,
> > +				 <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
> > +				 <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
> > +			clock-names = "aux", "ref", "com_aux", "usb3_pipe";
> > +
> > +			power-domains = <&gcc USB3_PHY_GDSC>;
> > +
> > +			resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
> > +				 <&gcc GCC_USB3_DP_PHY_PRIM_BCR>;
> > +			reset-names = "phy", "common";
> > +
> > +			#clock-cells = <1>;
> > +			#phy-cells = <1>;
> > +
> > +			orientation-switch;
> > +
> > +			status = "disabled";
> > +
> 
> Hi Dmitry,
> 
>  Sorry for asking this question after code got merged. I forgot about asking
> this last time when I commented on your patch and provided the HS Phy IRQ
> value.
> 
>  In SAR2130P, I remember that the lane orientation is reversed. As in on
> normal targets, if the orientatin GPIO reads "0" it means LANE_A but on
> SAR2130 it means LANE_B. Can you confirm if superspeed was tested only in
> one orientation only.

Thanks for the notice. I don't remember if I had USB3 or just USB2
connected to the USB-C connector. I will take a look and report
afterwards, but it might take some time.

> 
>  I can push code for setting orienation properly for this target if you can
> confirm that orienation is read reverse on SAR2130P.
> 
> Regards,
> Krishna,

-- 
With best wishes
Dmitry