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Message-ID: <mhng-5c0ea89d-908b-4009-ba23-e4fac45618b4@palmer-ri-x1c9>
Date: Wed, 27 Nov 2024 07:30:53 -0800 (PST)
From: Palmer Dabbelt <palmer@...osinc.com>
To: Linus Torvalds <torvalds@...ux-foundation.org>
CC: linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [GIT PULL] RISC-V Paches for the 6.13 Merge Window, Part 1
The following changes since commit 81983758430957d9a5cb3333fe324fd70cf63e7e:
Linux 6.12-rc5 (2024-10-27 12:52:02 -1000)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-6.13-mw1
for you to fetch changes up to 8d4f1e05ff821a5d59116ab8c3a30fcae81d8597:
RISC-V: Remove unnecessary include from compat.h (2024-11-26 11:48:53 -0800)
----------------------------------------------------------------
RISC-V Paches for the 6.13 Merge Window, Part 1
* Support for pointer masking in userspace,
* Support for probing vector misaligned access performance.
* Support for qspinlock on systems with Zacas and Zabha.
----------------------------------------------------------------
There's a handful of fixes working through other trees (the wait/wound lockdep
failures and a tools build fix), but aside from those everything is clean on my
end. I don't plan on having a part 2, unless there's something else in flight
that blows up.
----------------------------------------------------------------
Alexandre Ghiti (12):
riscv: Check that vdso does not contain any dynamic relocations
riscv: Move cpufeature.h macros into their own header
riscv: Do not fail to build on byte/halfword operations with Zawrs
riscv: Implement cmpxchg32/64() using Zacas
dt-bindings: riscv: Add Zabha ISA extension description
riscv: Implement cmpxchg8/16() using Zabha
riscv: Improve zacas fully-ordered cmpxchg()
riscv: Implement arch_cmpxchg128() using Zacas
riscv: Implement xchg8/16() using Zabha
riscv: Add ISA extension parsing for Ziccrse
dt-bindings: riscv: Add Ziccrse ISA extension description
riscv: Add qspinlock support
Charlie Jenkins (1):
riscv: Fix default misaligned access trap
Drew Fustini (1):
riscv: defconfig: enable gpio support for TH1520
Guo Ren (2):
asm-generic: ticket-lock: Reuse arch_spinlock_t of qspinlock
asm-generic: ticket-lock: Add separate ticket-lock.h
Jesse Taube (6):
RISC-V: Check scalar unaligned access on all CPUs
RISC-V: Scalar unaligned access emulated on hotplug CPUs
RISC-V: Replace RISCV_MISALIGNED with RISCV_SCALAR_MISALIGNED
RISC-V: Detect unaligned vector accesses supported
RISC-V: Report vector unaligned access speed hwprobe
RISC-V: hwprobe: Document unaligned vector perf key
Nick Hu (2):
cpuidle: riscv-sbi: Move sbi_cpuidle_init to arch_initcall
cpuidle: riscv-sbi: Add cpuidle_disabled() check
Palmer Dabbelt (7):
Merge patch series "riscv: Per-thread envcfg CSR support"
Merge patch series "cpuidle: riscv-sbi: Allow cpuidle pd used by other devices"
Merge patch series "RISC-V: Detect and report speed of unaligned vector accesses"
Merge patch series "Prevent dynamic relocations in vDSO"
Merge patch series "riscv: Userspace pointer masking and tagged address ABI"
Merge patch series "Zacas/Zabha support and qspinlocks"
RISC-V: Remove unnecessary include from compat.h
Samuel Holland (13):
riscv: Enable cbo.zero only when all harts support Zicboz
riscv: Add support for per-thread envcfg CSR values
riscv: Call riscv_user_isa_enable() only on the boot hart
dt-bindings: riscv: Add pointer masking ISA extensions
riscv: Add ISA extension parsing for pointer masking
riscv: Add CSR definitions for pointer masking
riscv: Add support for userspace pointer masking
riscv: Add support for the tagged address ABI
riscv: Allow ptrace control of the tagged address ABI
riscv: selftests: Add a pointer masking test
riscv: hwprobe: Export the Supm ISA extension
RISC-V: KVM: Allow Smnpm and Ssnpm extensions for guests
KVM: riscv: selftests: Add Smnpm and Ssnpm to get-reg-list test
Documentation/arch/riscv/hwprobe.rst | 19 ++
Documentation/arch/riscv/uabi.rst | 16 +
.../devicetree/bindings/riscv/extensions.yaml | 30 ++
.../locking/queued-spinlocks/arch-support.txt | 2 +-
arch/riscv/Kconfig | 138 ++++++++-
arch/riscv/Makefile | 6 +
arch/riscv/configs/defconfig | 1 +
arch/riscv/include/asm/Kbuild | 4 +-
arch/riscv/include/asm/cmpxchg.h | 286 +++++++++++++-----
arch/riscv/include/asm/compat.h | 1 -
arch/riscv/include/asm/cpufeature-macros.h | 66 ++++
arch/riscv/include/asm/cpufeature.h | 73 +----
arch/riscv/include/asm/csr.h | 16 +
arch/riscv/include/asm/entry-common.h | 1 +
arch/riscv/include/asm/hwcap.h | 7 +
arch/riscv/include/asm/hwprobe.h | 2 +-
arch/riscv/include/asm/mmu.h | 7 +
arch/riscv/include/asm/mmu_context.h | 13 +
arch/riscv/include/asm/processor.h | 9 +
arch/riscv/include/asm/spinlock.h | 47 +++
arch/riscv/include/asm/switch_to.h | 19 ++
arch/riscv/include/asm/uaccess.h | 43 ++-
arch/riscv/include/asm/vector.h | 2 +
arch/riscv/include/uapi/asm/hwprobe.h | 6 +
arch/riscv/include/uapi/asm/kvm.h | 2 +
arch/riscv/kernel/Makefile | 3 +-
arch/riscv/kernel/copy-unaligned.h | 5 +
arch/riscv/kernel/cpufeature.c | 16 +-
arch/riscv/kernel/fpu.S | 4 +-
arch/riscv/kernel/process.c | 154 ++++++++++
arch/riscv/kernel/ptrace.c | 42 +++
arch/riscv/kernel/setup.c | 37 +++
arch/riscv/kernel/smpboot.c | 2 -
arch/riscv/kernel/suspend.c | 4 +-
arch/riscv/kernel/sys_hwprobe.c | 44 +++
arch/riscv/kernel/traps_misaligned.c | 139 ++++++++-
arch/riscv/kernel/unaligned_access_speed.c | 156 +++++++++-
arch/riscv/kernel/vdso/Makefile | 10 +-
arch/riscv/kernel/vec-copy-unaligned.S | 58 ++++
arch/riscv/kernel/vector.c | 2 +-
arch/riscv/kvm/vcpu_onereg.c | 4 +
drivers/cpuidle/cpuidle-riscv-sbi.c | 11 +-
include/asm-generic/qspinlock.h | 2 +
include/asm-generic/spinlock.h | 87 +-----
include/asm-generic/spinlock_types.h | 12 +-
include/asm-generic/ticket_spinlock.h | 105 +++++++
include/uapi/linux/elf.h | 1 +
include/uapi/linux/prctl.h | 5 +-
tools/testing/selftests/kvm/riscv/get-reg-list.c | 8 +
tools/testing/selftests/riscv/Makefile | 2 +-
tools/testing/selftests/riscv/abi/.gitignore | 1 +
tools/testing/selftests/riscv/abi/Makefile | 10 +
.../testing/selftests/riscv/abi/pointer_masking.c | 332 +++++++++++++++++++++
53 files changed, 1790 insertions(+), 282 deletions(-)
create mode 100644 arch/riscv/include/asm/cpufeature-macros.h
create mode 100644 arch/riscv/include/asm/spinlock.h
create mode 100644 arch/riscv/kernel/vec-copy-unaligned.S
create mode 100644 include/asm-generic/ticket_spinlock.h
create mode 100644 tools/testing/selftests/riscv/abi/.gitignore
create mode 100644 tools/testing/selftests/riscv/abi/Makefile
create mode 100644 tools/testing/selftests/riscv/abi/pointer_masking.c
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