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Message-ID: <20241128112246.GF10431@google.com>
Date: Thu, 28 Nov 2024 20:22:46 +0900
From: Sergey Senozhatsky <senozhatsky@...omium.org>
To: Zhang Rui <rui.zhang@...el.com>
Cc: hpa@...or.com, peterz@...radead.org, thorsten.blum@...lux.com,
yuntao.wang@...ux.dev, tony.luck@...el.com, len.brown@...el.com,
srinivas.pandruvada@...el.com, linux-kernel@...r.kernel.org,
stable@...r.kernel.org, tglx@...utronix.de, mingo@...hat.com,
bp@...en8.de, dave.hansen@...ux.intel.com,
rafael.j.wysocki@...el.com, x86@...nel.org,
linux-pm@...r.kernel.org,
Sergey Senozhatsky <senozhatsky@...omium.org>
Subject: Re: bisected: [PATCH V4] x86/apic: Always explicitly disarm
TSC-deadline timer
On (24/11/28 20:18), Sergey Senozhatsky wrote:
> > Disable the TSC Deadline timer in lapic_timer_shutdown() by writing to
> > MSR_IA32_TSC_DEADLINE when in TSC-deadline mode. Also avoid writing
> > to the initial-count register (APIC_TMICT) which is ignored in
> > TSC-deadline mode.
Upstream commit ffd95846c6ec6cf1f93da411ea10d504036cab42 (forgot
to mention)
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