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Message-ID: <CAL2JzuzTnQkKGkVQ9HwCHsVAtCk9Z=iniXm0uMgi3ZnODyfC3A@mail.gmail.com>
Date: Thu, 28 Nov 2024 17:08:40 +0100
From: Erwan Velu <erwanaliasr1@...il.com>
To: Sasha Levin <sashal@...nel.org>
Cc: Borislav Petkov <bp@...en8.de>, linux-kernel@...r.kernel.org, stable@...r.kernel.org,
tglx@...utronix.de, mingo@...hat.com, dave.hansen@...ux.intel.com,
x86@...nel.org, puwen@...on.cn, seanjc@...gle.com, kim.phillips@....com,
jmattson@...gle.com, babu.moger@....com, peterz@...radead.org,
rick.p.edgecombe@...el.com, brgerst@...il.com, ashok.raj@...el.com,
mjguzik@...il.com, jpoimboe@...nel.org, nik.borisov@...e.com, aik@....com,
vegard.nossum@...cle.com, daniel.sneddon@...ux.intel.com, acdunlap@...gle.com,
pavel@...x.de
Subject: Re: [PATCH AUTOSEL 5.15 11/12] x86/barrier: Do not serialize MSR
accesses on AMD
But it was backported on 6.6 and the performance impact is pretty high
on some workloads.
As this patch is only providing a perf benefit and to keep consistency
with other stable kernels, would it be possible to get it merged ?
Le jeu. 28 nov. 2024 à 16:52, Sasha Levin <sashal@...nel.org> a écrit :
>
> On Thu, Nov 28, 2024 at 12:59:24PM +0100, Borislav Petkov wrote:
> >Hey folks,
> >
> >On Mon, Jan 15, 2024 at 06:26:56PM -0500, Sasha Levin wrote:
> >> From: "Borislav Petkov (AMD)" <bp@...en8.de>
> >>
> >> [ Upstream commit 04c3024560d3a14acd18d0a51a1d0a89d29b7eb5 ]
> >>
> >> AMD does not have the requirement for a synchronization barrier when
> >> acccessing a certain group of MSRs. Do not incur that unnecessary
> >> penalty there.
> >
> >Erwan just mentioned that this one is not in 6.1 and in 5.15. And I have mails
> >about it getting picked up by AUTOSEL.
> >
> >Did the AI reconsider in the meantime?
>
> You've missed the 5.10 mail :)
>
> Pavel objected to it so I've dropped it: https://lore.kernel.org/all/Zbli7QIGVFT8EtO4@sashalap/
>
> --
> Thanks,
> Sasha
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