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Message-ID: <20241128-goggles-laundry-d94c23ab39a4@spud>
Date: Thu, 28 Nov 2024 16:19:31 +0000
From: Conor Dooley <conor@...nel.org>
To: Alexandre Ghiti <alex@...ti.fr>
Cc: Conor Dooley <conor.dooley@...rochip.com>,
Will Deacon <will@...nel.org>,
Alexandre Ghiti <alexghiti@...osinc.com>,
Jonathan Corbet <corbet@....net>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Andrea Parri <parri.andrea@...il.com>,
Nathan Chancellor <nathan@...nel.org>,
Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>, Waiman Long <longman@...hat.com>,
Boqun Feng <boqun.feng@...il.com>, Arnd Bergmann <arnd@...db.de>,
Leonardo Bras <leobras@...hat.com>, Guo Ren <guoren@...nel.org>,
linux-doc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
linux-arch@...r.kernel.org
Subject: Re: [PATCH v6 13/13] riscv: Add qspinlock support
On Thu, Nov 28, 2024 at 03:50:09PM +0100, Alexandre Ghiti wrote:
> On 28/11/2024 15:14, Conor Dooley wrote:
> > On Thu, Nov 28, 2024 at 01:41:36PM +0000, Will Deacon wrote:
> > > On Thu, Nov 28, 2024 at 12:56:55PM +0000, Conor Dooley wrote:
> > > > On Sun, Nov 03, 2024 at 03:51:53PM +0100, Alexandre Ghiti wrote:
> > > > > In order to produce a generic kernel, a user can select
> > > > > CONFIG_COMBO_SPINLOCKS which will fallback at runtime to the ticket
> > > > > spinlock implementation if Zabha or Ziccrse are not present.
> > > > >
> > > > > Note that we can't use alternatives here because the discovery of
> > > > > extensions is done too late and we need to start with the qspinlock
> > > > > implementation because the ticket spinlock implementation would pollute
> > > > > the spinlock value, so let's use static keys.
> > > > >
> > > > > This is largely based on Guo's work and Leonardo reviews at [1].
> > > > >
> > > > > Link: https://lore.kernel.org/linux-riscv/20231225125847.2778638-1-guoren@kernel.org/ [1]
> > > > > Signed-off-by: Guo Ren <guoren@...nel.org>
> > > > > Signed-off-by: Alexandre Ghiti <alexghiti@...osinc.com>
> > > > This patch (now commit ab83647fadae2 ("riscv: Add qspinlock support"))
> > > > breaks boot on polarfire soc. It dies before outputting anything to the
> > > > console. My .config has:
> > > >
> > > > # CONFIG_RISCV_TICKET_SPINLOCKS is not set
> > > > # CONFIG_RISCV_QUEUED_SPINLOCKS is not set
> > > > CONFIG_RISCV_COMBO_SPINLOCKS=y
> > > I pointed out some of the fragility during review:
> > >
> > > https://lore.kernel.org/all/20241111164259.GA20042@willie-the-truck/
> > >
> > > so I'm kinda surprised it got merged tbh :/
> > Maybe it could be reverted rather than having a broken boot with the
> > default settings in -rc1.
>
>
> No need to rush before we know what's happening,I guess you bisected to this
> commit right?
The symptom is a failure to boot, without any console output, of course
I bisected it before blaming something specific. But I don't think it is
"rushing" as having -rc1 broken with an option's default is a massive pain
in the arse when it comes to testing.
> I don't have this soc, so can you provide $stval/$sepc/$scause, a config, a
> kernel, anything?
I don't have the former cos it died immediately on boot. config is
attached. It reproduces in QEMU so you don't need any hardware.
> Does the polarfire soc provide Ziccrse?
I don't think that is relevant because ziccrse is not listed in the dts,
so the kernel should not be assuming that LR/SC has a forward progress
guarantee. It's not even getting as far as riscv_spinlock_init() given
several things before that should be emitting logs, so it doesn't even
get to make any decisions about Ziccrse.
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