linux-kernel - Re: [PATCH net-next 2/2] net: dsa: microchip: Add SGMII port support to KSZ9477 switch

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Message-ID: <20241129135919.57d59c90@fedora.home>
Date: Fri, 29 Nov 2024 13:59:19 +0100
From: Maxime Chevallier <maxime.chevallier@...tlin.com>
To: <Tristram.Ha@...rochip.com>
Cc: Woojung Huh <woojung.huh@...rochip.com>, Andrew Lunn <andrew@...n.ch>,
 Vladimir Oltean <olteanv@...il.com>, Rob Herring <robh@...nel.org>,
 "Krzysztof Kozlowski" <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, "David S. Miller" <davem@...emloft.net>, Eric
 Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, Paolo
 Abeni <pabeni@...hat.com>, Marek Vasut <marex@...x.de>,
 <UNGLinuxDriver@...rochip.com>, <devicetree@...r.kernel.org>,
 <netdev@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH net-next 2/2] net: dsa: microchip: Add SGMII port
 support to KSZ9477 switch

Hello Tristram,

On Fri, 8 Nov 2024 17:56:33 -0800
<Tristram.Ha@...rochip.com> wrote:

> From: Tristram Ha <tristram.ha@...rochip.com>
> 
> The SGMII module of KSZ9477 switch can be setup in 3 ways: 0 for direct
> connect, 1 for 1000BaseT/1000BaseX SFP, and 2 for 10/100/1000BaseT SFP.
> 
> SFP is typically used so the default is 1.  The driver can detect
> 10/100/1000BaseT SFP and change the mode to 2.  For direct connect the
> device tree can use fixed-link for the SGMII port as this link will
> never be disconnected.
> 
> The SGMII module can only support basic link status of the SFP, so the
> port can be simulated as having a regular internal PHY when SFP cage
> logic is not used.
> 
> One issue for the 1000BaseX SFP is there is no link down interrupt, so
> the driver has to use polling to detect link off when the link is up.
> 
> Note the SGMII interrupt cannot be masked in hardware.  Also the module
> is not reset when the switch is reset.  It is important to reset the
> module properly to make sure interrupt is not triggered prematurely.
> 
> A PCS driver for the SGMII port is added to accommodate the SFP cage
> logic used in the phylink code.  It is used to confirm the link is up
> and process the SGMII interrupt.

I'm currently working on a product on which I need the SGMII/1000BaseX
port to work on KSZ9477, so I gave that series a try.

I seems that this PCS is actually a Designware XPCS, reading the
registers 0x2/3 returns 0x7996ced0, which is the PHY id for the
Designware XPCS. Looking at the register definitions, they are
indeed very very similar. Andrew already pointed out that the SGMII
acccessors in the series (port_sgmii_r/w) look like C45 MDIO accessors.

So, you could move forward by implementing an mdio bus for the PCS with
the C45 accessors mentionned above, and then plumb that to the XPCS
driver with the xpcs_create_mdiodev(). I'm still figuring out if the
KSZ9477 needs some extra bits of configuration to get that port fully
operationnal though.

I'm currently integrating such a solution on a 6.6 kernel, I would be
very happy to test any further version of this patchset.

Thanks,

Maxime