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Message-ID: <e3bb3f66-9cad-40a4-ab55-f1d5a8e34d4d@oss.qualcomm.com>
Date: Fri, 29 Nov 2024 16:33:36 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Neil Armstrong <neil.armstrong@...aro.org>,
Rob Clark <robdclark@...il.com>, Sean Paul <sean@...rly.run>,
Konrad Dybcio <konradybcio@...nel.org>,
Abhinav Kumar <quic_abhinavk@...cinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
Bjorn Andersson <andersson@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
Akhil P Oommen <quic_akhilpo@...cinc.com>
Cc: linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH v3 4/7] drm/msm: adreno: find bandwidth index of OPP and
set it along freq index
On 28.11.2024 11:25 AM, Neil Armstrong wrote:
> The Adreno GPU Management Unit (GMU) can also scale the DDR Bandwidth
> along the Frequency and Power Domain level, until now we left the OPP
> core scale the OPP bandwidth via the interconnect path.
>
> In order to enable bandwidth voting via the GPU Management
> Unit (GMU), when an opp is set by devfreq we also look for
> the corresponding bandwidth index in the previously generated
> bw_table and pass this value along the frequency index to the GMU.
>
> The AB pre-calculated vote is appended to the bandwidth index
> to inform the GMU firmware the quantity of bandwidth we need.
>
> Since we now vote for all resources via the GMU, setting the OPP
> is no more needed, so we can completely skip calling
> dev_pm_opp_set_opp() in this situation.
>
> Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 23 +++++++++++++++++++++--
> drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 2 +-
> drivers/gpu/drm/msm/adreno/a6xx_hfi.c | 6 +++---
> 3 files changed, 25 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> index ee2010a01186721dd377f1655fcf05ddaff77131..c09442ecc861c4e56c81e7e775b9e57baf7d2e51 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> @@ -110,9 +110,11 @@ void a6xx_gmu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp,
> bool suspended)
> {
> struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
> + const struct a6xx_info *info = adreno_gpu->info->a6xx;
> struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu);
> struct a6xx_gmu *gmu = &a6xx_gpu->gmu;
> u32 perf_index;
> + u32 bw_index = 0;
> unsigned long gpu_freq;
> int ret = 0;
>
> @@ -125,6 +127,21 @@ void a6xx_gmu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp,
> if (gpu_freq == gmu->gpu_freqs[perf_index])
> break;
>
> + /* If enabled, find the corresponding DDR bandwidth index */
> + if (info->bcms && gmu->nr_gpu_bws > 1) {
> + unsigned int bw = dev_pm_opp_get_bw(opp, true, 0);
> +
> + for (bw_index = 0; bw_index < gmu->nr_gpu_bws - 1; bw_index++) {
> + if (bw == gmu->gpu_bw_table[bw_index])
> + break;
> + }
> +
> + if (bw_index) {
> + bw_index |= AB_VOTE(gmu->gpu_ab_votes[bw_index]);
> + bw_index |= AB_VOTE_ENABLE;
> + }
> + }
If we couple frequency levels with bw levels (i.e. duplicate the highest
bandwidth a couple times), we can drop all this search logic..
> +
> gmu->current_perf_index = perf_index;
> gmu->freq = gmu->gpu_freqs[perf_index];
>
> @@ -140,8 +157,10 @@ void a6xx_gmu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp,
> return;
>
> if (!gmu->legacy) {
> - a6xx_hfi_set_freq(gmu, perf_index);
> - dev_pm_opp_set_opp(&gpu->pdev->dev, opp);
> + a6xx_hfi_set_freq(gmu, perf_index, bw_index);
> + /* With Bandwidth voting, we now vote for all resources, so skip OPP set */
> + if (!bw_index)
> + dev_pm_opp_set_opp(&gpu->pdev->dev, opp);
..and then it would come down to..
if (!info->bcms)
Konrad
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