[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <5c3d91e3-e9d3-4e8d-bd4f-f7cbe765dddc@oss.qualcomm.com>
Date: Sat, 30 Nov 2024 15:32:51 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Jagadeesh Kona <quic_jkona@...cinc.com>
Cc: Brian Masney <bmasney@...hat.com>, Bjorn Andersson
<andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Ajit Pandey <quic_ajipan@...cinc.com>,
Imran Shaik <quic_imrashai@...cinc.com>,
Taniya Das <quic_tdas@...cinc.com>,
Satya Priya Kakitapalli <quic_skakitap@...cinc.com>,
Shivnandan Kumar <quic_kshivnan@...cinc.com>
Subject: Re: [PATCH 2/3] arm64: dts: qcom: sa8775p: Add CPU OPP tables to
scale DDR/L3
On 14.11.2024 11:48 PM, Dmitry Baryshkov wrote:
> On Mon, Nov 11, 2024 at 06:39:48PM +0530, Jagadeesh Kona wrote:
>>
>>
>> On 10/17/2024 9:12 PM, Brian Masney wrote:
>>> On Thu, Oct 17, 2024 at 02:58:31PM +0530, Jagadeesh Kona wrote:
>>>> + cpu0_opp_table: opp-table-cpu0 {
>>>> + compatible = "operating-points-v2";
>>>> + opp-shared;
>>>> +
>>>> + cpu0_opp_1267mhz: opp-1267200000 {
>>>> + opp-hz = /bits/ 64 <1267200000>;
>>>> + opp-peak-kBps = <6220800 29491200>;
>>>> + };
>>>> +
>>>> + cpu0_opp_1363mhz: opp-1363200000 {
>>>> + opp-hz = /bits/ 64 <1363200000>;
>>>> + opp-peak-kBps = <6220800 29491200>;
>>>> + };
>>>
>>> [snip]
>>>
>>>> + cpu4_opp_table: opp-table-cpu4 {
>>>> + compatible = "operating-points-v2";
>>>> + opp-shared;
>>>> +
>>>> + cpu4_opp_1267mhz: opp-1267200000 {
>>>> + opp-hz = /bits/ 64 <1267200000>;
>>>> + opp-peak-kBps = <6220800 29491200>;
>>>> + };
>>>> +
>>>> + cpu4_opp_1363mhz: opp-1363200000 {
>>>> + opp-hz = /bits/ 64 <1363200000>;
>>>> + opp-peak-kBps = <6220800 29491200>;
>>>> + };
>>>
>>> There's no functional differences in the cpu0 and cpu4 opp tables. Can
>>> a single table be used?
>>>
>>> This aligns with my recollection that this particular SoC only has the
>>> gold cores.
>>>
>>> Brian
>>>
>>
>> Thanks Brian for your review. Sorry for the delayed response.
>>
>> We require separate OPP tables for CPU0 and CPU4 to allow independent
>> scaling of DDR and L3 frequencies for each CPU domain, with the final
>> DDR and L3 frequencies being an aggregate of both.
>>
>> If we use a single OPP table for both CPU domains, then _allocate_opp_table() [1]
>> won't be invoked for CPU4. As a result both CPU devices will end up in sharing
>> the same ICC path handle, which could lead to one CPU device overwriting the bandwidth
>> votes of other.
Oh that's a fun find.. clocks get the same treatment.. very bad,
but may explain some schroedingerbugs.
Taking a peek at some code paths, wouldn't dropping opp-shared
solve our issues? dev_pm_opp_set_sharing_cpus() overrides it
Konrad
Powered by blists - more mailing lists