linux-kernel - [PATCH v2 17/31] arm64: dts: qcom: sm8650: correct sleep clock frequency

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Message-Id: <20241130-fix-board-clocks-v2-17-b9a35858657e@linaro.org>
Date: Sat, 30 Nov 2024 03:44:29 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Bjorn Andersson <andersson@...nel.org>, 
 Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>, 
 Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>
Cc: Leo Yan <leo.yan@...ux.dev>, Joseph Gates <jgates@...areup.com>, 
 Georgi Djakov <djakov@...nel.org>, Shawn Guo <shawn.guo@...aro.org>, 
 Stephan Gerhold <stephan@...hold.net>, Zac Crosby <zac@...areup.com>, 
 Bastian Köcher <git@...r.de>, 
 Andy Gross <andy.gross@...aro.org>, Jeremy McNicoll <jeremymc@...hat.com>, 
 Rohit Agarwal <quic_rohiagar@...cinc.com>, 
 Melody Olvera <quic_molvera@...cinc.com>, 
 Bhupesh Sharma <bhupesh.sharma@...aro.org>, 
 cros-qcom-dts-watchers@...omium.org, Stephen Boyd <swboyd@...omium.org>, 
 Rajendra Nayak <quic_rjendra@...cinc.com>, 
 Martin Botka <martin.botka@...ainline.org>, 
 Jonathan Marek <jonathan@...ek.ca>, Vinod Koul <vkoul@...nel.org>, 
 Tengfei Fan <quic_tengfan@...cinc.com>, 
 Fenglin Wu <quic_fenglinw@...cinc.com>, 
 Neil Armstrong <neil.armstrong@...aro.org>, 
 Abel Vesa <abel.vesa@...aro.org>, 
 Alexandru Marc Serdeliuc <serdeliuk@...oo.com>, 
 Vladimir Zapolskiy <vladimir.zapolskiy@...aro.org>, 
 Sibi Sankar <quic_sibis@...cinc.com>, 
 Bryan O'Donoghue <bryan.odonoghue@...aro.org>, Jun Nie <jun.nie@...aro.org>, 
 James Willcox <jwillcox@...areup.com>, Max Chen <mchen@...areup.com>, 
 Vincent Knecht <vincent.knecht@...loo.org>, Benjamin Li <benl@...areup.com>, 
 Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>, 
 linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org, 
 linux-kernel@...r.kernel.org, 
 Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Subject: [PATCH v2 17/31] arm64: dts: qcom: sm8650: correct sleep clock
 frequency

The SM8650 platform uses PMK8550 to provide sleep clock. According to the
documentation, that clock has 32.7645 kHz frequency. Correct the sleep
clock definition.

Fixes: 6fbdb3c1fac7 ("arm64: dts: qcom: sm8650: add initial SM8650 MTP dts")
Fixes: a834911d50c1 ("arm64: dts: qcom: sm8650: add initial SM8650 QRD dts")
Fixes: 01061441029e ("arm64: dts: qcom: sm8650: add support for the SM8650-HDK board")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
---
 arch/arm64/boot/dts/qcom/sm8650-hdk.dts | 2 +-
 arch/arm64/boot/dts/qcom/sm8650-mtp.dts | 2 +-
 arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8650-hdk.dts b/arch/arm64/boot/dts/qcom/sm8650-hdk.dts
index f00bdff4280af22f6f8b23e33238f53c602bc169..d0912735b54e5090f9f213c2c9341e03effbbbff 100644
--- a/arch/arm64/boot/dts/qcom/sm8650-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8650-hdk.dts
@@ -1113,7 +1113,7 @@ &sdhc_2 {
 };
 
 &sleep_clk {
-	clock-frequency = <32000>;
+	clock-frequency = <32764>;
 };
 
 &swr0 {
diff --git a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts b/arch/arm64/boot/dts/qcom/sm8650-mtp.dts
index 0db2cb03f252d19a1f8b171a562a8e06290c8a21..76ef43c10f77d8329ccf0a05c9d590a46372315f 100644
--- a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8650-mtp.dts
@@ -730,7 +730,7 @@ &sdhc_2 {
 };
 
 &sleep_clk {
-	clock-frequency = <32000>;
+	clock-frequency = <32764>;
 };
 
 &swr0 {
diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
index c5e8c3c2df91a49476f49832c0bd6418f4dfae3d..71033fba21b56bc63620dca3e453c14191739675 100644
--- a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
+++ b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
@@ -1041,7 +1041,7 @@ &remoteproc_mpss {
 };
 
 &sleep_clk {
-	clock-frequency = <32000>;
+	clock-frequency = <32764>;
 };
 
 &spi4 {

-- 
2.39.5