linux-kernel - Re: (subset) [PATCH v5 0/5] Add initial support for QCS615 SoC and QCS615 RIDE board

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Message-ID: <173315466527.263019.11318467939121751784.b4-ty@kernel.org>
Date: Mon,  2 Dec 2024 09:51:03 -0600
From: Bjorn Andersson <andersson@...nel.org>
To: Konrad Dybcio <konradybcio@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Catalin Marinas <catalin.marinas@....com>,
	Will Deacon <will@...nel.org>,
	Lijuan Gao <quic_lijuang@...cinc.com>
Cc: kernel@...cinc.com,
	linux-arm-msm@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: Re: (subset) [PATCH v5 0/5] Add initial support for QCS615 SoC and QCS615 RIDE board


On Mon, 04 Nov 2024 17:10:07 +0800, Lijuan Gao wrote:
> Introduces the Device Tree for the QCS615 platform.
> 
> Features added and enabled:
> - CPUs with PSCI idle states
> - Interrupt-controller with PDC wakeup support
> - Timers, TCSR Clock Controllers
> - Reserved Shared memory
> - QFPROM
> - TLMM
> - Watchdog
> - RPMH controller
> - Sleep stats driver
> - Rpmhpd power controller
> - Interconnect
> - GCC and Rpmhcc
> - QUP with Uart serial support
> 
> [...]

Applied, thanks!

[5/5] arm64: defconfig: enable clock controller, interconnect and pinctrl for QCS615
      commit: 9eec6ce36b5dc981327e9f58025d012e524687b4

Best regards,
-- 
Bjorn Andersson <andersson@...nel.org>