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Message-ID: <a4f6ojknv3hats4rwmdg5mw2rxhx7kq4u6axybdawak54crn5s@xnjbl7zno42s>
Date: Sun, 1 Dec 2024 22:25:05 -0600
From: Bjorn Andersson <andersson@...nel.org>
To: Taniya Das <quic_tdas@...cinc.com>
Cc: Michael Turquette <mturquette@...libre.com>, 
	Stephen Boyd <sboyd@...nel.org>, Abhishek Sahu <absahu@...eaurora.org>, 
	Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
	Conor Dooley <conor+dt@...nel.org>, Catalin Marinas <catalin.marinas@....com>, 
	Will Deacon <will@...nel.org>, Ajit Pandey <quic_ajipan@...cinc.com>, 
	Imran Shaik <quic_imrashai@...cinc.com>, Jagadeesh Kona <quic_jkona@...cinc.com>, 
	linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, 
	Dmitry Baryshkov <dmitry.baryshkov@...aro.org>, Gabor Juhos <j4g8y7@...il.com>, 
	Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>, Bryan O'Donoghue <bryan.odonoghue@...aro.org>
Subject: Re: [PATCH v3 00/11] Add support for videocc, camcc, dispcc and
 gpucc on Qualcomm QCS615 platform

On Fri, Nov 08, 2024 at 09:39:17AM +0530, Taniya Das wrote:
> Add support for multimedia clock controllers on Qualcomm QCS615 platform.
> Update the defconfig to enable these clock controllers.
> 
> Global clock controller support
> https://lore.kernel.org/all/20241022-qcs615-clock-driver-v4-0-3d716ad0d987@quicinc.com/
> 
> Signed-off-by: Taniya Das <quic_tdas@...cinc.com>

Dropping this series from my queue, due to lack of response from author.

Taniya, please answer questions/feedback from Dmitry, Vladimir and
Bryan, and repose as necessary.

Thanks,
Bjorn

> ---
> Changes in v3:
> - update PLL configs to use BIT and GENMASK for vco_val and vco_mask for all CCs [Bryan O'Donoghue]
> - Link to v2: https://lore.kernel.org/r/20241101-qcs615-mm-clockcontroller-v2-0-d1a4870a4aed@quicinc.com
> 
> Changes in v2:
> - cleanups in clk_alpha_pll_slew_update and clk_alpha_pll_slew_enable functions [Christophe]
> - update PLL configs for "vco_val = 0x0" shift(20)  [Bryan O'Donoghue]
> - update PLL configs to use lower case for L value  [Dmitry]
> - Link parents for IFE/IPE/BPS GDSCs as Titan Top GDSC [Bryan O'Donoghue, Dmitry]
> - Remove DT_BI_TCXO_AO from camcc-qcs615           [Dmitry]
> - Remove HW_CTRL_TRIGGER from camcc-qcs615         [Bryan O'Donoghue]
> - Update platform name for default configuration   [Dmitry]
> - Link to v1: https://lore.kernel.org/r/20241019-qcs615-mm-clockcontroller-v1-0-4cfb96d779ae@quicinc.com
> 
> ---
> Taniya Das (11):
>       clk: qcom: Update the support for alpha mode configuration
>       clk: qcom: clk-alpha-pll: Add support for dynamic update for slewing PLLs
>       dt-bindings: clock: Add Qualcomm QCS615 Camera clock controller
>       clk: qcom: camcc-qcs615: Add QCS615 camera clock controller driver
>       dt-bindings: clock: Add Qualcomm QCS615 Display clock controller
>       clk: qcom: dispcc-qcs615: Add QCS615 display clock controller driver
>       dt-bindings: clock: Add Qualcomm QCS615 Graphics clock controller
>       clk: qcom: gpucc-qcs615: Add QCS615 graphics clock controller driver
>       dt-bindings: clock: Add Qualcomm QCS615 Video clock controller
>       clk: qcom: videocc-qcs615: Add QCS615 video clock controller driver
>       arm64: defconfig: Enable QCS615 clock controllers
> 
>  .../bindings/clock/qcom,qcs615-camcc.yaml          |   60 +
>  .../bindings/clock/qcom,qcs615-dispcc.yaml         |   73 +
>  .../bindings/clock/qcom,qcs615-gpucc.yaml          |   66 +
>  .../bindings/clock/qcom,qcs615-videocc.yaml        |   64 +
>  arch/arm64/configs/defconfig                       |    4 +
>  drivers/clk/qcom/Kconfig                           |   35 +
>  drivers/clk/qcom/Makefile                          |    4 +
>  drivers/clk/qcom/camcc-qcs615.c                    | 1591 ++++++++++++++++++++
>  drivers/clk/qcom/clk-alpha-pll.c                   |  172 +++
>  drivers/clk/qcom/clk-alpha-pll.h                   |    1 +
>  drivers/clk/qcom/dispcc-qcs615.c                   |  786 ++++++++++
>  drivers/clk/qcom/gpucc-qcs615.c                    |  525 +++++++
>  drivers/clk/qcom/videocc-qcs615.c                  |  332 ++++
>  include/dt-bindings/clock/qcom,qcs615-camcc.h      |  110 ++
>  include/dt-bindings/clock/qcom,qcs615-dispcc.h     |   52 +
>  include/dt-bindings/clock/qcom,qcs615-gpucc.h      |   39 +
>  include/dt-bindings/clock/qcom,qcs615-videocc.h    |   30 +
>  17 files changed, 3944 insertions(+)
> ---
> base-commit: 15e7d45e786a62a211dd0098fee7c57f84f8c681
> change-id: 20241016-qcs615-mm-clockcontroller-cff9aea7a006
> 
> Best regards,
> -- 
> Taniya Das <quic_tdas@...cinc.com>
> 

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