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Message-ID: <1733163111-1414816-1-git-send-email-radhey.shyam.pandey@amd.com>
Date: Mon, 2 Dec 2024 23:41:51 +0530
From: Radhey Shyam Pandey <radhey.shyam.pandey@....com>
To: <Thinh.Nguyen@...opsys.com>, <gregkh@...uxfoundation.org>,
	<michal.simek@....com>, <robert.hancock@...ian.com>
CC: <linux-usb@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
	<linux-kernel@...r.kernel.org>, <git@....com>, Neal Frager
	<neal.frager@....com>, <stable@...r.kernel.org>, Radhey Shyam Pandey
	<radhey.shyam.pandey@....com>
Subject: [PATCH v3] usb: dwc3: xilinx: make sure pipe clock is deselected in usb2 only mode

From: Neal Frager <neal.frager@....com>

When the USB3 PHY is not defined in the Linux device tree, there could
still be a case where there is a USB3 PHY active on the board and enabled
by the first stage bootloader. If serdes clock is being used then the USB
will fail to enumerate devices in 2.0 only mode.

To solve this, make sure that the PIPE clock is deselected whenever the
USB3 PHY is not defined and guarantees that the USB2 only mode will work
in all cases.

Fixes: 9678f3361afc ("usb: dwc3: xilinx: Skip resets and USB3 register settings for USB2.0 mode")
Cc: stable@...r.kernel.org
Signed-off-by: Neal Frager <neal.frager@....com>
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@....com>
Acked-by: Peter Korsgaard <peter@...sgaard.com>
---
Changes for v3:
- Modify commit description to drop second "is" and add Peter ack.

Changes for v2:
- Add stable@...r.kernel.org in CC.
---
 drivers/usb/dwc3/dwc3-xilinx.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/dwc3/dwc3-xilinx.c b/drivers/usb/dwc3/dwc3-xilinx.c
index e3738e1610db..a33a42ba0249 100644
--- a/drivers/usb/dwc3/dwc3-xilinx.c
+++ b/drivers/usb/dwc3/dwc3-xilinx.c
@@ -121,8 +121,11 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx *priv_data)
 	 * in use but the usb3-phy entry is missing from the device tree.
 	 * Therefore, skip these operations in this case.
 	 */
-	if (!priv_data->usb3_phy)
+	if (!priv_data->usb3_phy) {
+		/* Deselect the PIPE Clock Select bit in FPD PIPE Clock register */
+		writel(PIPE_CLK_DESELECT, priv_data->regs + XLNX_USB_FPD_PIPE_CLK);
 		goto skip_usb3_phy;
+	}
 
 	crst = devm_reset_control_get_exclusive(dev, "usb_crst");
 	if (IS_ERR(crst)) {
-- 
2.34.1


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