linux-kernel - [PATCH 2/2] net: phy: realtek: add dt property to disable broadcast PHY address

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Message-Id: <20241202195029.2045633-2-kmlinuxm@gmail.com>
Date: Tue,  3 Dec 2024 03:50:29 +0800
From: Zhiyuan Wan <kmlinuxm@...il.com>
To: andrew@...n.ch
Cc: kuba@...nel.org,
	netdev@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	willy.liu@...ltek.com,
	Zhiyuan Wan <kmlinuxm@...il.com>,
	Yuki Lee <febrieac@...look.com>
Subject: [PATCH 2/2] net: phy: realtek: add dt property to disable broadcast PHY address

This patch add support to disable 'broadcast PHY address' feature of
RTL8211F.

This feature is enabled defaultly after a reset of this transceiver.
When this feature is enabled, the phy not only responds to the
configuration PHY address by pin states on board, but also responds
to address 0, the optional broadcast address of the MDIO bus.

But not every transceiver supports this feature, when RTL8211
shares one MDIO bus with other transceivers which doesn't support
this feature, like mt7530 switch chip (integrated in mt7621 SoC),
it usually causes address conflict, leads to the
port of RTL8211FS stops working.

This patch adds dt property `realtek,phyad0-disable` to disable
broadcast PHY address feature of this transceiver.

This patch did not change the default behavior of this driver.

Signed-off-by: Yuki Lee <febrieac@...look.com>
Signed-off-by: Zhiyuan Wan <kmlinuxm@...il.com>
---
 drivers/net/phy/realtek.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index 10a87d58c..014dd2da1 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -31,6 +31,7 @@
 #define RTL8211F_PHYCR1				0x18
 #define RTL8211F_PHYCR2				0x19
 #define RTL8211F_INSR				0x1d
+#define RTL8211F_PHYAD0_EN			BIT(13)

 #define RTL8211FS_FIBER_ESR			0x0F
 #define RTL8211FS_MODE_MASK			0xC000
@@ -421,12 +422,18 @@ static int rtl8211f_config_init(struct phy_device *phydev)
 	struct device *dev = &phydev->mdio.dev;
 	u16 val_txdly, val_rxdly;
 	int ret;
+	u16 phyad0_disable = 0;

+	if (of_property_read_bool(dev->of_node, "realtek,phyad0-disable")) {
+		phyad0_disable = RTL8211F_PHYAD0_EN;
+		dev_dbg(dev, "disabling MDIO address 0 for this phy");
+	}
 	ret = phy_modify_paged_changed(phydev, 0xa43, RTL8211F_PHYCR1,
-				       RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF,
+				       RTL8211F_ALDPS_PLL_OFF  | RTL8211F_ALDPS_ENABLE |
+				       RTL8211F_ALDPS_XTAL_OFF | phyad0_disable,
 				       priv->phycr1);
 	if (ret < 0) {
-		dev_err(dev, "aldps mode  configuration failed: %pe\n",
+		dev_err(dev, "mode configuration failed: %pe\n",
 			ERR_PTR(ret));
 		return ret;
 	}
-- 
2.30.2