Message-ID: <da2ba3df-eb47-4b55-a0c9-e038a3b9da30@quicinc.com>
Date: Mon, 2 Dec 2024 18:25:35 +0530
From: Mukesh Kumar Savaliya <quic_msavaliy@...cinc.com>
To: Krzysztof Kozlowski <krzk@...nel.org>, <konrad.dybcio@...aro.org>,
        <andersson@...nel.org>, <andi.shyti@...nel.org>,
        <linux-arm-msm@...r.kernel.org>, <dmaengine@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-i2c@...r.kernel.org>,
        <conor+dt@...nel.org>, <agross@...nel.org>,
        <devicetree@...r.kernel.org>, <vkoul@...nel.org>, <linux@...blig.org>,
        <dan.carpenter@...aro.org>, <Frank.Li@....com>,
        <konradybcio@...nel.org>, <bryan.odonoghue@...aro.org>,
        <krzk+dt@...nel.org>, <robh@...nel.org>
CC: <quic_vdadhani@...cinc.com>
Subject: Re: [PATCH v5 1/4] dt-bindindgs: i2c: qcom,i2c-geni: Document shared
 flag



On 12/2/2024 4:34 PM, Krzysztof Kozlowski wrote:
> On 02/12/2024 11:38, Mukesh Kumar Savaliya wrote:
>>>
>>> Come with one flag or enum, if needed, covering all your cases like this.
>>>
>> Let me explain, this feature is one of the additional software case
>> adding on base protocol support. if we dont have more than one usecase
>> or repurposing this feature, why do we need to add enums ? I see one
>> flag gpi_mode but it's internal to driver not exposed to user or expose
>> any usecase/feature.
>>
>> Below was our earlier context, just wanted to add for clarity.
>> --
>>   > Is sharing of IP blocks going to be also for other devices? If yes, then
>>   > this should be one property for all Qualcomm devices. If not, then be
>>   > sure that this is the case because I will bring it up if you come with
>>   > one more solution for something else.
> 
> 
> You keep repeating the same. You won't receive any other answer.
> 
So far i was in context to SEs. I am not sure in qualcomm SOC all cores 
supporting this feature and if it at all it supports, it may have it's 
own mechanism then what is followed in SE IP. I was probably thinking on 
my owned IP core hence i was revolving around.

Hope this dt-binding i can conclude somewhere by seeking answer from 
other IP core owners within qualcomm.
>>   >
>> IP blocks like SE can be shared. Here we are talking about I2C sharing.
>> In future it can be SPI sharing. But design wise it fits better to add
>> flag per SE node. Same we shall be adding for SPI too in future.
> 
> 
> How flag per SE node is relevant? I did not ask to move the property.
> 
>>
>> Please let me know your further suggestions.
> We do not talk about I2C or SPI here only. We talk about entire SoC.
> Since beginning. Find other patch proposals and align with rest of
> Qualcomm developers so that you come with only one definition for this
> feature/characteristic. Or do you want to say that I am free to NAK all
> further properties duplicating this one?
> 
> Please confirm that you Qualcomm engineers understand the last statement
> and that every block will use se-shared, even if we speak about UFS for
> example.
This UFS word atleast makes me understand and gave me clarity that i 
need to talk to different IP owners within qualcomm and get an agreement 
for my i2c feature. I am not sure if there exist an usecase the way we 
are sharing for i2c. Also i don't know how we can make similar 
description if different cores and functionality are different.  If you 
have heard from any other IP core, please keep some usecases/IP names.

Since This demands internal discussion, so give me time to conclude how 
the IPs are shared and is it the similar to what i have developed here 
for I2C. (sorry that so far i was in context to my SE protocols/ IPs only).
> 
> Best regards,
> Krzysztof

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