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Message-Id: <20241203134137.2114847-15-m.wilczynski@samsung.com>
Date: Tue,  3 Dec 2024 14:41:37 +0100
From: Michal Wilczynski <m.wilczynski@...sung.com>
To: mturquette@...libre.com, sboyd@...nel.org, robh@...nel.org,
	krzk+dt@...nel.org, conor+dt@...nel.org, drew@...7.com, guoren@...nel.org,
	wefu@...hat.com, jassisinghbrar@...il.com, paul.walmsley@...ive.com,
	palmer@...belt.com, aou@...s.berkeley.edu, frank.binns@...tec.com,
	matt.coster@...tec.com, maarten.lankhorst@...ux.intel.com,
	mripard@...nel.org, tzimmermann@...e.de, airlied@...il.com, simona@...ll.ch,
	ulf.hansson@...aro.org, jszhang@...nel.org, m.szyprowski@...sung.com
Cc: linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
	dri-devel@...ts.freedesktop.org, linux-pm@...r.kernel.org, Michal Wilczynski
	<m.wilczynski@...sung.com>
Subject: [RFC PATCH v1 14/14] riscv: dts: Add GPU node to TH1520 device tree

Add a device tree node for the IMG BXM-4-64 GPU present in the T-HEAD
TH1520 SoC used by the Lichee Pi 4A board. This node enables support for
the GPU using the drm/imagination driver.

By adding this node, the kernel can recognize and initialize the GPU,
providing graphics acceleration capabilities on the Lichee Pi 4A and
other boards based on the TH1520 SoC.

This commit is following convention introduced here [1].

Link: https://lore.kernel.org/all/20241118-sets-bxs-4-64-patch-v1-v2-1-3fd45d9fb0cf@imgtec.com/ [1]

Signed-off-by: Michal Wilczynski <m.wilczynski@...sung.com>
---
 arch/riscv/boot/dts/thead/th1520.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
index 58f93ad3eb6e..5023c0c29168 100644
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -500,6 +500,18 @@ clk: clock-controller@...f010000 {
 			#clock-cells = <1>;
 		};
 
+		gpu: gpu@...f400000 {
+			compatible = "img,img-bxm-4-64", "img,img-rogue";
+			reg = <0xff 0xef400000 0x0 0x100000>;
+			interrupt-parent = <&plic>;
+			interrupts = <102 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&vosys_clk CLK_GPU_CORE>,
+				 <&vosys_clk CLK_GPU_CFG_ACLK>;
+			clock-names = "core", "sys";
+			power-domains = <&pd TH1520_AON_GPU_PD>;
+			status = "okay";
+		};
+
 		vosys_clk: clock-controller {
 			compatible = "thead,th1520-clk-vo";
 			thead,vosys-regmap = <&vosys_reg>;
-- 
2.34.1


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