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Message-ID: <e7af04b0-7c87-42da-9a3d-152a87aea81d@kernel.org>
Date: Tue, 3 Dec 2024 16:48:19 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Michal Wilczynski <m.wilczynski@...sung.com>, mturquette@...libre.com,
 sboyd@...nel.org, robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
 drew@...7.com, guoren@...nel.org, wefu@...hat.com, jassisinghbrar@...il.com,
 paul.walmsley@...ive.com, palmer@...belt.com, aou@...s.berkeley.edu,
 frank.binns@...tec.com, matt.coster@...tec.com,
 maarten.lankhorst@...ux.intel.com, mripard@...nel.org, tzimmermann@...e.de,
 airlied@...il.com, simona@...ll.ch, ulf.hansson@...aro.org,
 jszhang@...nel.org, m.szyprowski@...sung.com
Cc: linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
 dri-devel@...ts.freedesktop.org, linux-pm@...r.kernel.org
Subject: Re: [RFC PATCH v1 08/14] dt-bindings: power: thead,th1520: Add
 support for power domains

On 03/12/2024 14:41, Michal Wilczynski wrote:
> +
> +title: T-HEAD TH1520 Power Domain Controller
> +
> +maintainers:
> +  - Michal Wilczynski <m.wilczynski@...sung.com>
> +
> +description: |
> +  The T-HEAD TH1520 SoC includes a power domain controller responsible for
> +  managing the power states of various hardware domains such as the GPU.
> +
> +  This binding describes the power domain controller node, which can be used by

Do not describe the binding. Describe the hardware. Entire paragraph
feels pointless.

> +  devices to manage their power domains.
> +
> +properties:
> +  compatible:
> +    const: "thead,th1520-pd"


You never tested the code you sent. Drop quotes. Limited review follows.

> +
> +  thead,vosys-regmap:

NAK.

'reg' is for this.


> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description: |
> +      Phandle to a syscon node representing the shared register space of the VO (Video Output) subsystem.

Please wrap code according to coding style (checkpatch is not a coding
style description, but only a tool).


> +      This register space includes both clock control registers and other control registers used for
> +      operations like resetting the GPU. Since these registers reside in the same address space,
> +      access to them is coordinated through a shared syscon regmap provided by the specified syscon node.
> +
> +  '#power-domain-cells':
> +    const: 1
> +
> +required:
> +  - compatible
> +  - thead,vosys-regmap
> +  - '#power-domain-cells'
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    vosys_regmap: vosys@...f528000 {
> +        compatible = "syscon";
> +        reg = <0xff 0xef528000 0x0 0x1000>;
> +    };

Drop, not related.



Best regards,
Krzysztof

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