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Message-ID: <d726c20e-a7fc-4477-b2f9-b933d993a566@collabora.com>
Date: Tue, 3 Dec 2024 10:40:53 +0100
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Frank Wunderlich <linux@...web.de>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Matthias Brugger <matthias.bgg@...il.com>
Cc: Frank Wunderlich <frank-w@...lic-files.de>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH v2 02/18] arm64: dts: mediatek: mt7988: add mmc support
Il 02/12/24 13:25, Frank Wunderlich ha scritto:
> From: Frank Wunderlich <frank-w@...lic-files.de>
>
> Add devicetree node for MMC controller.
>
> Signed-off-by: Frank Wunderlich <frank-w@...lic-files.de>
> ---
> changes:
> v2:
> squash "add missing label for apmixedsys"
> ---
> arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 24 ++++++++++++++++++++++-
> 1 file changed, 23 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
> index 46969577c87a..5e40446cb7b3 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
> @@ -100,7 +100,7 @@ watchdog: watchdog@...1c000 {
> #reset-cells = <1>;
> };
>
> - clock-controller@...1e000 {
> + apmixedsys: clock-controller@...1e000 {
> compatible = "mediatek,mt7988-apmixedsys";
> reg = <0 0x1001e000 0 0x1000>;
> #clock-cells = <1>;
> @@ -278,6 +278,28 @@ usb@...00000 {
> clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck";
> };
>
> + mmc0: mmc@...30000 {
> + compatible = "mediatek,mt7988-mmc";
> + reg = <0 0x11230000 0 0x1000>,
> + <0 0x11D60000 0 0x1000>;
> + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&infracfg CLK_INFRA_MSDC400>,
> + <&infracfg CLK_INFRA_MSDC2_HCK>,
> + <&infracfg CLK_INFRA_66M_MSDC_0_HCK>,
> + <&infracfg CLK_INFRA_133M_MSDC_0_HCK>;
> + assigned-clocks = <&topckgen CLK_TOP_EMMC_250M_SEL>,
> + <&topckgen CLK_TOP_EMMC_400M_SEL>;
> + assigned-clock-parents = <&topckgen CLK_TOP_NET1PLL_D5_D2>,
> + <&apmixedsys CLK_APMIXED_MSDCPLL>;
> + clock-names = "source",
> + "hclk",
> + "axi_cg",
> + "ahb_cg";
One last nitpick: all of the clock-names *do* fit in one line.
clock-names = "source", "hclk", "axi_cg", "ahb_cg";
After which
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
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