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Message-ID: <20241204-sm8750_master_dt-v3-7-4d5a8269950b@quicinc.com>
Date: Wed, 4 Dec 2024 15:18:07 -0800
From: Melody Olvera <quic_molvera@...cinc.com>
To: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio
<konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski
<krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Catalin Marinas
<catalin.marinas@....com>,
Will Deacon <will@...nel.org>,
"Satya Durga
Srinivasu Prabhala" <quic_satyap@...cinc.com>,
Trilok Soni
<quic_tsoni@...cinc.com>
CC: <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
Melody Olvera <quic_molvera@...cinc.com>,
Raviteja Laggyshetty
<quic_rlaggysh@...cinc.com>,
Krzysztof Kozlowski
<krzysztof.kozlowski@...aro.org>
Subject: [PATCH v3 7/7] arm64: defconfig: Enable SM8750 SoC base configs
Enable GCC, TCSRCC, Pinctrl and Interconnect configs for Qualcomm's
SM8750 SoC which is required to boot SM8750 MTP/QRD boards to a
console shell. The configs are required to be marked as builtin
and not modules due to the console driver dependencies.
Co-developed-by: Raviteja Laggyshetty <quic_rlaggysh@...cinc.com>
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@...cinc.com>
Signed-off-by: Melody Olvera <quic_molvera@...cinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
---
arch/arm64/configs/defconfig | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 6beb0b5efd2e693b826d4a3106d4c4b4582d1927..b7a039f3d763b5723cb21810a649281c24b0f2f1 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -630,6 +630,7 @@ CONFIG_PINCTRL_SM8350=y
CONFIG_PINCTRL_SM8450=y
CONFIG_PINCTRL_SM8550=y
CONFIG_PINCTRL_SM8650=y
+CONFIG_PINCTRL_SM8750=y
CONFIG_PINCTRL_X1E80100=y
CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
CONFIG_PINCTRL_LPASS_LPI=m
@@ -1361,6 +1362,7 @@ CONFIG_SM_GCC_8350=y
CONFIG_SM_GCC_8450=y
CONFIG_SM_GCC_8550=y
CONFIG_SM_GCC_8650=y
+CONFIG_SM_GCC_8750=y
CONFIG_SM_GPUCC_6115=m
CONFIG_SM_GPUCC_8150=y
CONFIG_SM_GPUCC_8250=y
@@ -1370,6 +1372,7 @@ CONFIG_SM_GPUCC_8550=m
CONFIG_SM_GPUCC_8650=m
CONFIG_SM_TCSRCC_8550=y
CONFIG_SM_TCSRCC_8650=y
+CONFIG_SM_TCSRCC_8750=y
CONFIG_SM_VIDEOCC_8250=y
CONFIG_QCOM_HFPLL=y
CONFIG_CLK_GFM_LPASS_SM8250=m
@@ -1650,6 +1653,7 @@ CONFIG_INTERCONNECT_QCOM_SM8350=y
CONFIG_INTERCONNECT_QCOM_SM8450=y
CONFIG_INTERCONNECT_QCOM_SM8550=y
CONFIG_INTERCONNECT_QCOM_SM8650=y
+CONFIG_INTERCONNECT_QCOM_SM8750=y
CONFIG_INTERCONNECT_QCOM_X1E80100=y
CONFIG_COUNTER=m
CONFIG_RZ_MTU3_CNT=m
--
2.46.1
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