| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20241204103042.1904639-4-arnd@kernel.org>
Date: Wed, 4 Dec 2024 11:30:34 +0100
From: Arnd Bergmann <arnd@...nel.org>
To: linux-kernel@...r.kernel.org,
x86@...nel.org
Cc: Arnd Bergmann <arnd@...db.de>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>,
"H. Peter Anvin" <hpa@...or.com>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Andy Shevchenko <andy@...nel.org>,
Matthew Wilcox <willy@...radead.org>,
Sean Christopherson <seanjc@...gle.com>,
Davide Ciminaghi <ciminaghi@...dd.com>,
Paolo Bonzini <pbonzini@...hat.com>,
kvm@...r.kernel.org
Subject: [PATCH 03/11] x86: Kconfig.cpu: split out 64-bit atom
From: Arnd Bergmann <arnd@...db.de>
Both 32-bit and 64-bit builds allow optimizing using "-march=atom", but
this is somewhat suboptimal, as gcc and clang use this option to refer
to the original in-order "Bonnell" microarchitecture used in the early
"Diamondville" and "Silverthorne" processors that were mostly 32-bit only.
The later 22nm "Silvermont" architecture saw a significant redesign to
an out-of-order architecture that is reflected in the -mtune=silvermont
flag in the compilers, and all of these are 64-bit capable. Variations
of this microarchitecture were in CPUs launched from 2014 to 2021 and
are still common in 2024.
Split this up so that 32-bit targets keep building with -march=atom,
but 64-bit ones get the more useful silvermont optimization. On modern
"tremont" and newer CPUs, using -march=generic or -march=tremont
would be even better, but the silvermont optimization is still an
improvement.
Signed-off-by: Arnd Bergmann <arnd@...db.de>
---
arch/x86/Kconfig.cpu | 28 ++++++++++++++++++++--------
arch/x86/Makefile | 4 ++--
arch/x86/Makefile_32.cpu | 3 +--
3 files changed, 23 insertions(+), 12 deletions(-)
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index 42e6a40876ea..05a3f57ac20b 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -155,6 +155,15 @@ config MPENTIUM4
-Paxville
-Dempsey
+config MATOM
+ bool "Intel Atom (Bonnell)"
+ help
+
+ Select this for the Intel Atom platform. Intel Atom CPUs have an
+ in-order pipelining architecture and thus can benefit from
+ accordingly optimized code.
+ This includes all the 32-bit-only Atom chips such as N2xx and
+ Z5xx/Z6xx.
config MK6
bool "K6/K6-II/K6-III"
@@ -278,14 +287,17 @@ config MCORE2
family in /proc/cpuinfo. Newer ones have 6 and older ones 15
(not a typo)
-config MATOM
- bool "Intel Atom"
+config MSILVERMONT
+ bool "Intel Atom (Silvermont/Goldmont)"
+ depends on X86_64
help
-
- Select this for the Intel Atom platform. Intel Atom CPUs have an
- in-order pipelining architecture and thus can benefit from
- accordingly optimized code. Use a recent GCC with specific Atom
- support in order to fully benefit from selecting this option.
+ Select this to optimize for the 64-bit Intel Atom platform
+ of the 22nm Silvermont microarchitecture and its 14nm
+ Goldmont shrink (e.g. Atom C2xxx, Atom Z3xxx, Celeron
+ N2xxx/J1xxx, Pentium N3xxx/J2xxx).
+ Kernels built with this option are incompatible with very
+ early Atom CPUs based on the Bonnell microarchitecture,
+ such as Atom 230/330, D4xx/D5xx, D2xxx, N2xxx or Z2xxx.
config GENERIC_CPU
bool "Generic-x86-64"
@@ -318,7 +330,7 @@ config X86_INTERNODE_CACHE_SHIFT
config X86_L1_CACHE_SHIFT
int
default "7" if MPENTIUM4 || MPSC
- default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
+ default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MSILVERMONT || MVIAC7 || X86_GENERIC || GENERIC_CPU
default "4" if MELAN || M486SX || M486 || MGEODEGX1
default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index 5b773b34768d..05887ae282f5 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -182,14 +182,14 @@ else
cflags-$(CONFIG_MK8) += -march=k8
cflags-$(CONFIG_MPSC) += -march=nocona
cflags-$(CONFIG_MCORE2) += -march=core2
- cflags-$(CONFIG_MATOM) += -march=atom
+ cflags-$(CONFIG_MSILVERMONT) += -march=silvermont
cflags-$(CONFIG_GENERIC_CPU) += -mtune=generic
KBUILD_CFLAGS += $(cflags-y)
rustflags-$(CONFIG_MK8) += -Ctarget-cpu=k8
rustflags-$(CONFIG_MPSC) += -Ctarget-cpu=nocona
rustflags-$(CONFIG_MCORE2) += -Ctarget-cpu=core2
- rustflags-$(CONFIG_MATOM) += -Ctarget-cpu=atom
+ rustflags-$(CONFIG_MSILVERMONT) += -Ctarget-cpu=silvermont
rustflags-$(CONFIG_GENERIC_CPU) += -Ztune-cpu=generic
KBUILD_RUSTFLAGS += $(rustflags-y)
diff --git a/arch/x86/Makefile_32.cpu b/arch/x86/Makefile_32.cpu
index 94834c4b5e5e..0adc3a59520a 100644
--- a/arch/x86/Makefile_32.cpu
+++ b/arch/x86/Makefile_32.cpu
@@ -33,8 +33,7 @@ cflags-$(CONFIG_MCYRIXIII) += $(call cc-option,-march=c3,-march=i486) $(align)
cflags-$(CONFIG_MVIAC3_2) += $(call cc-option,-march=c3-2,-march=i686)
cflags-$(CONFIG_MVIAC7) += -march=i686
cflags-$(CONFIG_MCORE2) += -march=i686 $(call tune,core2)
-cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom,$(call cc-option,-march=core2,-march=i686)) \
- $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic))
+cflags-$(CONFIG_MATOM) += -march=atom
# AMD Elan support
cflags-$(CONFIG_MELAN) += -march=i486
--
2.39.5
Powered by blists - more mailing lists