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Message-ID: <0c1f4e6a-a77b-46d1-b944-9eb47d66556d@linaro.org>
Date: Wed, 4 Dec 2024 13:16:46 +0100
From: Neil Armstrong <neil.armstrong@...aro.org>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Cc: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, cros-qcom-dts-watchers@...omium.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/5] arm64: dts: qcom: sdm845-db845c-navigation-mezzanine:
fix ov7251 lane properties
On 04/12/2024 12:05, Dmitry Baryshkov wrote:
> On Wed, Dec 04, 2024 at 11:56:54AM +0100, Neil Armstrong wrote:
>> Bindings documents data-lanes as a single entry with a separate
>> clock-lanes property, but DT uses 2 entries in data-lanes.
>>
>> This would suggest clock-lanes is missing, fix the DT using the
>> bindings example.
>>
>> This fixes:
>> sdm845-db845c-navigation-mezzanine.dtso: camera@60: port:endpoint:data-lanes: [0, 1] is too long
>> from schema $id: http://devicetree.org/schemas/media/i2c/ovti,ov7251.yaml#
>>
>> Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
>> ---
>> arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso | 3 ++-
>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso b/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
>> index 0a87df806cafc8e726aacc07a772ca478d0ee3df..5a16f4c2b346b314af3d614266e1ca034057e643 100644
>> --- a/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
>> +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
>> @@ -115,7 +115,8 @@ camera@60 {
>>
>> port {
>> ov7251_ep: endpoint {
>> - data-lanes = <0 1>;
>> + clock-lanes = <1>;
>> + data-lanes = <0>;
>
> Is it really this way or the other way around, clock = <0>, data = <1>?
No idea actually, on the schematics the lanes from the DB845 are :
CSI0_P/N -> OV7251_CSI3_LANE0_P/N -> MIPI_CSI3_LANE0_P -> SoC
and
CLKP/N -> OV7251_CSI3_CLK_P/N -> MIPI_CSI3_CLK_P/N -> SoC
So I assume the data-lane is 0, for clock-lane I just used
the example, but I found nothing in the code using those assignments
Neil
>
>> /* remote-endpoint = <&csiphy3_ep>; */
>> };
>> };
>>
>> --
>> 2.34.1
>>
>
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