lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <affbe506-6a74-4822-ad83-9db5faa60cf6@quicinc.com>
Date: Thu, 5 Dec 2024 10:00:25 -0800
From: Melody Olvera <quic_molvera@...cinc.com>
To: Krzysztof Kozlowski <krzk@...nel.org>
CC: Bjorn Andersson <andersson@...nel.org>,
        Michael Turquette
	<mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>, Rob Herring
	<robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
	<conor+dt@...nel.org>,
        Taniya Das <quic_tdas@...cinc.com>, <linux-arm-msm@...r.kernel.org>,
        <linux-clk@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 5/8] dt-bindings: clock: qcom: Add SM8750 GCC



On 12/5/2024 1:28 AM, Krzysztof Kozlowski wrote:
> On Wed, Dec 04, 2024 at 11:37:17AM -0800, Melody Olvera wrote:
>> From: Taniya Das <quic_tdas@...cinc.com>
>>
>> Add device tree bindings for the global clock controller on Qualcomm
>> SM8750 platform.
>>
>> Signed-off-by: Taniya Das <quic_tdas@...cinc.com>
>> Signed-off-by: Melody Olvera <quic_molvera@...cinc.com>
>> ---
>>   .../devicetree/bindings/clock/qcom,sm8750-gcc.yaml |  62 ++++++
>>   include/dt-bindings/clock/qcom,sm8750-gcc.h        | 226 +++++++++++++++++++++
>>   2 files changed, 288 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8750-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8750-gcc.yaml
>> new file mode 100644
>> index 0000000000000000000000000000000000000000..aab7039fd28db2f4e2a6b9b7a6340d17ad05156d
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/qcom,sm8750-gcc.yaml
>> @@ -0,0 +1,62 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/clock/qcom,sm8750-gcc.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm Global Clock & Reset Controller on SM8750
>> +
>> +maintainers:
>> +  - Taniya Das <quic_tdas@...cinc.com>
>> +
>> +description: |
>> +  Qualcomm global clock control module provides the clocks, resets and power
>> +  domains on SM8750
>> +
>> +  See also: include/dt-bindings/clock/qcom,sm8750-gcc.h
>> +
>> +properties:
>> +  compatible:
>> +    const: qcom,sm8750-gcc
>> +
>> +  clocks:
>> +    items:
>> +      - description: Board XO source
>> +      - description: Board Always On XO source
>> +      - description: Sleep clock source
>> +      - description: PCIE 0 Pipe clock source
> Are you absolutely sure there is no PCIE 1 Pipe clock? List will only be
> able to grow at the end, breaking the order, if it turns out there is
> such clock input.

Yes; I've checked all our dts and documentation and as far as I can 
tell, there's
no PCIE 1 pipe clk.

Thanks,
Melody

> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
>


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ