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Message-ID: <20241205222847.7889-8-mario.limonciello@amd.com>
Date: Thu, 5 Dec 2024 16:28:39 -0600
From: Mario Limonciello <mario.limonciello@....com>
To: "Gautham R . Shenoy" <gautham.shenoy@....com>
CC: Perry Yuan <perry.yuan@....com>, <linux-kernel@...r.kernel.org>,
	<linux-pm@...r.kernel.org>, Dhananjay Ugwekar <Dhananjay.Ugwekar@....com>,
	Mario Limonciello <mario.limonciello@....com>
Subject: [PATCH 07/15] cpufreq/amd-pstate: Only update the cached value in msr_set_epp() on success

If writing the MSR MSR_AMD_CPPC_REQ fails then the cached value in the
amd_cpudata structure should not be updated.

Signed-off-by: Mario Limonciello <mario.limonciello@....com>
---
 drivers/cpufreq/amd-pstate.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index 14bd6faa3d730..ce70d1bfa55d0 100644
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c
@@ -278,11 +278,15 @@ static int msr_set_epp(struct amd_cpudata *cpudata, u32 epp)
 
 	value &= ~AMD_PSTATE_EPP_PERF_MASK;
 	value |= FIELD_PREP(AMD_PSTATE_EPP_PERF_MASK, epp);
-	WRITE_ONCE(cpudata->cppc_req_cached, value);
 
 	ret = wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, value);
-	if (!ret)
-		cpudata->epp_cached = epp;
+	if (ret) {
+		pr_err("failed to set energy perf value (%d)\n", ret);
+		return ret;
+	}
+
+	cpudata->epp_cached = epp;
+	WRITE_ONCE(cpudata->cppc_req_cached, value);
 
 	return ret;
 }
-- 
2.43.0


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