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Message-ID: <9fa8c4b3-1585-4f2c-84df-d61d8c5c8329@linux.alibaba.com>
Date: Thu, 5 Dec 2024 15:25:10 +0800
From: Shuai Xue <xueshuai@...ux.alibaba.com>
To: Ilkka Koskinen <ilkka@...amperecomputing.com>,
Jing Zhang <renyu.zj@...ux.alibaba.com>, Will Deacon <will@...nel.org>,
Mark Rutland <mark.rutland@....com>, Jonathan Corbet <corbet@....net>,
Jonathan Cameron <jonathan.cameron@...wei.com>
Cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-doc@...r.kernel.org
Subject: Re: [PATCH 1/2] perf/dwc_pcie: Fix the event numbers
在 2024/12/5 14:19, Ilkka Koskinen 写道:
> According to Databook, L1 aux is event number 0x08 and
> TX L0s and RX L0S is 0x09. Fix the event numbers for the
> two events.
>
> Signed-off-by: Ilkka Koskinen <ilkka@...amperecomputing.com>
> ---
> drivers/perf/dwc_pcie_pmu.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/perf/dwc_pcie_pmu.c b/drivers/perf/dwc_pcie_pmu.c
> index 9cbea9675e21..890cf3bb43a2 100644
> --- a/drivers/perf/dwc_pcie_pmu.c
> +++ b/drivers/perf/dwc_pcie_pmu.c
> @@ -199,8 +199,8 @@ static struct attribute *dwc_pcie_pmu_time_event_attrs[] = {
> DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(L1_1, 0x05),
> DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(L1_2, 0x06),
> DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(CFG_RCVRY, 0x07),
> - DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(TX_RX_L0S, 0x08),
> - DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(L1_AUX, 0x09),
> + DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(L1_AUX, 0x08),
> + DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(TX_RX_L0S, 0x09),
>
> /* Group #1 */
> DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(tx_pcie_tlp_data_payload, 0x20),
LGTM.
Reviewed-by: Shuai Xue <xueshuai@...ux.alibaba.com>
Thanks.
Best Regards,
Shuai
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