linux-kernel - Re: [PATCH net-next v5 2/5] net: phy: microchip

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Message-ID: <946b59e0-18f9-4e4f-a3c9-3de432db4340@redhat.com>
Date: Thu, 5 Dec 2024 12:07:57 +0100
From: Paolo Abeni <pabeni@...hat.com>
To: Divya.Koppera@...rochip.com, andrew@...n.ch, Arun.Ramadoss@...rochip.com,
 UNGLinuxDriver@...rochip.com, hkallweit1@...il.com, linux@...linux.org.uk,
 davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
 netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
 richardcochran@...il.com, vadim.fedorenko@...ux.dev
Subject: Re: [PATCH net-next v5 2/5] net: phy: microchip_ptp : Add ptp library
 for Microchip phys

On 12/5/24 12:00, Divya.Koppera@...rochip.com wrote:
> From: Paolo Abeni <pabeni@...hat.com> Thursday, December 5, 2024 3:17 PM
>> To: Divya Koppera - I30481 <Divya.Koppera@...rochip.com>;
>> andrew@...n.ch; Arun Ramadoss - I17769
>> <Arun.Ramadoss@...rochip.com>; UNGLinuxDriver
>> <UNGLinuxDriver@...rochip.com>; hkallweit1@...il.com;
>> linux@...linux.org.uk; davem@...emloft.net; edumazet@...gle.com;
>> kuba@...nel.org; netdev@...r.kernel.org; linux-kernel@...r.kernel.org;
>> richardcochran@...il.com; vadim.fedorenko@...ux.dev
>> Subject: Re: [PATCH net-next v5 2/5] net: phy: microchip_ptp : Add ptp library
>> for Microchip phys
>>
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
>> content is safe
>>
>> On 12/3/24 09:52, Divya Koppera wrote:
>>> +struct mchp_ptp_clock *mchp_ptp_probe(struct phy_device *phydev, u8
>> mmd,
>>> +                                   u16 clk_base_addr, u16
>>> +port_base_addr) {
>>> +     struct mchp_ptp_clock *clock;
>>> +     int rc;
>>> +
>>> +     clock = devm_kzalloc(&phydev->mdio.dev, sizeof(*clock), GFP_KERNEL);
>>> +     if (!clock)
>>> +             return ERR_PTR(-ENOMEM);
>>> +
>>> +     clock->port_base_addr   = port_base_addr;
>>> +     clock->clk_base_addr    = clk_base_addr;
>>> +     clock->mmd              = mmd;
>>> +
>>> +     /* Register PTP clock */
>>> +     clock->caps.owner          = THIS_MODULE;
>>> +     snprintf(clock->caps.name, 30, "%s", phydev->drv->name);
>>> +     clock->caps.max_adj        = MCHP_PTP_MAX_ADJ;
>>> +     clock->caps.n_ext_ts       = 0;
>>> +     clock->caps.pps            = 0;
>>> +     clock->caps.adjfine        = mchp_ptp_ltc_adjfine;
>>> +     clock->caps.adjtime        = mchp_ptp_ltc_adjtime;
>>> +     clock->caps.gettime64      = mchp_ptp_ltc_gettime64;
>>> +     clock->caps.settime64      = mchp_ptp_ltc_settime64;
>>> +     clock->ptp_clock = ptp_clock_register(&clock->caps,
>>> +                                           &phydev->mdio.dev);
>>> +     if (IS_ERR(clock->ptp_clock))
>>> +             return ERR_PTR(-EINVAL);
>>> +
>>> +     /* Initialize the SW */
>>> +     skb_queue_head_init(&clock->tx_queue);
>>> +     skb_queue_head_init(&clock->rx_queue);
>>> +     INIT_LIST_HEAD(&clock->rx_ts_list);
>>> +     spin_lock_init(&clock->rx_ts_lock);
>>> +     mutex_init(&clock->ptp_lock);
>>
>> The s/w initialization is completed after successfully registering the new ptp
>> clock, is that safe? It looks like it may race with ptp callbacks.
> 
> If I understand your comment correctly ptp_lock in the clock instance is not initialized before registering the clock.
> Rest of the initializations are related to packet processing and also depends on phydev->default_timestamp and mii_ts instance only after which packets will be forwarded to phy.
> As we are also re-initializing the clock ptp4l/application need to restart.
> 
> Initializing ptp_lock before registering the clock should be safe from ptp point of view. 
> 
> Let me know your opinion?

I guess moving the lock initialization before the registration should be
safe.

Please not that the main issue open is WRT code reuse: I second Andrew
opinion about the need of consolidating the microchip ptp drivers
implementation. A library should be able to abstract above individual
device differences.

Thanks,

Paolo