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Message-Id: <20241205-rcar-gh-dsi-v2-5-42471851df86@ideasonboard.com>
Date: Thu, 05 Dec 2024 15:45:00 +0200
From: Tomi Valkeinen <tomi.valkeinen@...asonboard.com>
To: Laurent Pinchart <laurent.pinchart@...asonboard.com>,
Kieran Bingham <kieran.bingham+renesas@...asonboard.com>,
Andrzej Hajda <andrzej.hajda@...el.com>,
Neil Armstrong <neil.armstrong@...aro.org>, Robert Foss <rfoss@...nel.org>,
Jonas Karlman <jonas@...boo.se>, Jernej Skrabec <jernej.skrabec@...il.com>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, LUU HOAI <hoai.luu.ub@...esas.com>,
Jagan Teki <jagan@...rulasolutions.com>, Sam Ravnborg <sam@...nborg.org>,
Biju Das <biju.das.jz@...renesas.com>
Cc: Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
dri-devel@...ts.freedesktop.org, linux-renesas-soc@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Laurent Pinchart <laurent.pinchart+renesas@...asonboard.com>,
linux-clk@...r.kernel.org,
Tomi Valkeinen <tomi.valkeinen+renesas@...asonboard.com>
Subject: [PATCH v2 05/10] clk: renesas: r8a779h0: Add display clocks
From: Tomi Valkeinen <tomi.valkeinen+renesas@...asonboard.com>
Add display related clocks for DU, DSI, FCPVD, and VSPD.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@...asonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@...asonboard.com>
Tested-by: Geert Uytterhoeven <geert+renesas@...der.be>
---
drivers/clk/renesas/r8a779h0-cpg-mssr.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/clk/renesas/r8a779h0-cpg-mssr.c b/drivers/clk/renesas/r8a779h0-cpg-mssr.c
index e20c048bfa9b..dc37e987c0e6 100644
--- a/drivers/clk/renesas/r8a779h0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779h0-cpg-mssr.c
@@ -179,6 +179,9 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] __initconst = {
DEF_MOD("canfd0", 328, R8A779H0_CLK_SASYNCPERD2),
DEF_MOD("csi40", 331, R8A779H0_CLK_CSI),
DEF_MOD("csi41", 400, R8A779H0_CLK_CSI),
+ DEF_MOD("dis0", 411, R8A779H0_CLK_S0D3),
+ DEF_MOD("dsitxlink0", 415, R8A779H0_CLK_DSIREF),
+ DEF_MOD("fcpvd0", 508, R8A779H0_CLK_S0D3),
DEF_MOD("hscif0", 514, R8A779H0_CLK_SASYNCPERD1),
DEF_MOD("hscif1", 515, R8A779H0_CLK_SASYNCPERD1),
DEF_MOD("hscif2", 516, R8A779H0_CLK_SASYNCPERD1),
@@ -227,6 +230,7 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] __initconst = {
DEF_MOD("vin15", 811, R8A779H0_CLK_S0D4_VIO),
DEF_MOD("vin16", 812, R8A779H0_CLK_S0D4_VIO),
DEF_MOD("vin17", 813, R8A779H0_CLK_S0D4_VIO),
+ DEF_MOD("vspd0", 830, R8A779H0_CLK_S0D1_VIO),
DEF_MOD("wdt1:wdt0", 907, R8A779H0_CLK_R),
DEF_MOD("cmt0", 910, R8A779H0_CLK_R),
DEF_MOD("cmt1", 911, R8A779H0_CLK_R),
--
2.43.0
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