[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAMuHMdUo4Fy+MF6fp6oFn965pf0=ZR0or0GQ6nZLGb9PmVYe5Q@mail.gmail.com>
Date: Fri, 6 Dec 2024 14:54:54 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Claudiu <claudiu.beznea@...on.dev>
Cc: prabhakar.mahadev-lad.rj@...renesas.com, jic23@...nel.org, lars@...afoo.de,
robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
magnus.damm@...il.com, mturquette@...libre.com, sboyd@...nel.org,
p.zabel@...gutronix.de, linux-iio@...r.kernel.org,
linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Subject: Re: [PATCH v2 01/15] clk: renesas: r9a08g045: Add clocks, resets and
power domain support for the ADC IP
On Fri, Dec 6, 2024 at 12:13 PM Claudiu <claudiu.beznea@...on.dev> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
>
> Add clocks, resets and power domains for ADC IP available on the Renesas
> RZ/G3S SoC.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
> ---
>
> Changes in v2:
> - rebased on top of the latest r9a08g045-cpg version
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
i.e. will queue in renesas-clk for v6.14.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Powered by blists - more mailing lists