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Message-ID: <87zfl8oqeg.fsf@bootlin.com>
Date: Fri, 06 Dec 2024 15:08:23 +0100
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: Nikolaus Voss <nv@...n.de>
Cc: Alexander Stein <alexander.stein@...tq-group.com>,  Liu Ying
 <victor.liu@....com>,  Luca Ceresoli <luca.ceresoli@...tlin.com>,  Fabio
 Estevam <festevam@...x.de>,  Marek Vasut <marex@...x.de>,  Andrzej Hajda
 <andrzej.hajda@...el.com>,  Neil Armstrong <neil.armstrong@...aro.org>,
  Robert Foss <rfoss@...nel.org>,  Laurent Pinchart
 <Laurent.pinchart@...asonboard.com>,  Jonas Karlman <jonas@...boo.se>,
  Jernej Skrabec <jernej.skrabec@...il.com>,  David Airlie
 <airlied@...il.com>,  Daniel Vetter <daniel@...ll.ch>,
  nikolaus.voss@...g-streit.com,  dri-devel@...ts.freedesktop.org,
  linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] drm: bridge: fsl-ldb: fixup mode on freq mismatch

Hi Nikolaus,

On 03/12/2024 at 20:09:52 +01, Nikolaus Voss <nv@...n.de> wrote:

> LDB clock has to be a fixed multiple of the pixel clock.

Not only, IIUC it also needs to be synchronized, ie. share the same
source.

> As LDB and pixel clock are derived from different clock sources
> (at least on imx8mp),

Wait, what? I am sorry but that is not at all recommended, both should
come from video_pll1 which the de-facto versatile PLL to use, no? Am I
missing something here?

> this constraint cannot be satisfied for
> any pixel clock, which leads to flickering and incomplete
> lines on the attached display.
>
> To overcome this, check this condition in .atomic_check() and
> adapt the pixel clock accordingly.
>
> Cc: <stable@...r.kernel.org>
> Fixes: 463db5c2ed4a ("drm: bridge: ldb: Implement simple Freescale i.MX8MP LDB bridge")
>

Nit: No \n here.

> Signed-off-by: Nikolaus Voss <nv@...n.de>

Thanks,
Miquèl

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