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Message-ID: <78D4C1B5-3EE7-47F0-A7A2-F1ACFE71CED0@nvidia.com>
Date: Fri, 06 Dec 2024 12:08:21 -0500
From: Zi Yan <ziy@...dia.com>
To: Matthew Wilcox <willy@...radead.org>
Cc: linux-mm@...ck.org, Andrew Morton <akpm@...ux-foundation.org>,
 Geert Uytterhoeven <geert@...ux-m68k.org>, Vlastimil Babka <vbabka@...e.cz>,
 David Hildenbrand <david@...hat.com>, Miaohe Lin <linmiaohe@...wei.com>,
 Kefeng Wang <wangkefeng.wang@...wei.com>, John Hubbard <jhubbard@...dia.com>,
 "Huang, Ying" <ying.huang@...el.com>, Ryan Roberts <ryan.roberts@....com>,
 Alexander Potapenko <glider@...gle.com>, Kees Cook <keescook@...omium.org>,
 linux-kernel@...r.kernel.org, Geert Uytterhoeven <geert+renesas@...der.be>,
 Vineet Gupta <vgupta@...nel.org>,
 Mathieu Desnoyers <mathieu.desnoyers@...icios.com>
Subject: Re: [PATCH] mm: use clear_user_(high)page() for arch with special
 user folio handling

On 6 Dec 2024, at 11:42, Matthew Wilcox wrote:

> On Fri, Dec 06, 2024 at 09:19:38AM -0500, Zi Yan wrote:
>> For architectures setting ARCH_HAS_CPU_CACHE_ALIASING, which requires
>> flushing cache and arc, which sets folio->flags after clearing a user
>> folio
>
> I think arc just has some legacy code left that needs to be ripped out.
> See commit d5272aaa8257 which took away ARCH_HAS_CPU_CACHE_ALIASING
> from arc.

The PG_dc_clean bit seems not to be related to cache aliasing.
See commit eacd0e950dc2 ("ARC: [mm] Lazy D-cache flush (non aliasing VIPT)")

>
> Looking at 8690bbcf3b70, I wonder if you want to use
> cpu_dcache_is_aliasing() here?

Yeah, this is more precise. Will use this in my next version. Thanks.

Best Regards,
Yan, Zi

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