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Message-ID: <323eee41-70f2-48f5-8705-a0d30666c1d3@quicinc.com>
Date: Fri, 6 Dec 2024 08:58:33 +0800
From: Yijie Yang <quic_yijiyang@...cinc.com>
To: Andrew Lunn <andrew@...n.ch>,
Konrad Dybcio
<konrad.dybcio@....qualcomm.com>
CC: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio
<konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski
<krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Richard Cochran
<richardcochran@...il.com>,
<linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <netdev@...r.kernel.org>
Subject: Re: [PATCH v4 2/2] arm64: dts: qcom: qcs8300-ride: enable ethernet0
On 2024-12-06 07:39, Andrew Lunn wrote:
>>>> +ðernet0 {
>>>> + phy-mode = "2500base-x";
>>>> + phy-handle = <&sgmii_phy0>;
>>>
>>> Nit picking, but your PHY clearly is not an SGMII PHY if it is using
>>> 2500base-x. I would call it just phy0, so avoiding using SGMII
>>> wrongly, which most vendors do use the name SGMII wrongly.
>>
>> Andrew, does that mean the rest of the patch looks ok?
>>
>> If so, I don't have any concerns either.
>
> Yes, this is a minor problem, the rest looks O.K, so once this is
> fixed it can be merged.
>
> Andrew
I will update the PHY name and pad the register in the next version.
--
Best Regards,
Yijie
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