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Message-ID: <CAMuHMdU+PPeCNb5y75A1YTf1EvvCQEgD1t-=6C_YyK0gDK3R8A@mail.gmail.com>
Date: Fri, 6 Dec 2024 14:43:29 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Tomi Valkeinen <tomi.valkeinen@...asonboard.com>
Cc: Laurent Pinchart <laurent.pinchart@...asonboard.com>,
Kieran Bingham <kieran.bingham+renesas@...asonboard.com>,
Andrzej Hajda <andrzej.hajda@...el.com>, Neil Armstrong <neil.armstrong@...aro.org>,
Robert Foss <rfoss@...nel.org>, Jonas Karlman <jonas@...boo.se>,
Jernej Skrabec <jernej.skrabec@...il.com>, David Airlie <airlied@...il.com>,
Simona Vetter <simona@...ll.ch>, Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Geert Uytterhoeven <geert+renesas@...der.be>, Magnus Damm <magnus.damm@...il.com>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>,
LUU HOAI <hoai.luu.ub@...esas.com>, Jagan Teki <jagan@...rulasolutions.com>,
Sam Ravnborg <sam@...nborg.org>, Biju Das <biju.das.jz@...renesas.com>,
dri-devel@...ts.freedesktop.org, linux-renesas-soc@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Laurent Pinchart <laurent.pinchart+renesas@...asonboard.com>, linux-clk@...r.kernel.org,
Tomi Valkeinen <tomi.valkeinen+renesas@...asonboard.com>
Subject: Re: [PATCH v3 05/10] clk: renesas: r8a779h0: Add display clocks
Hi Tomi,
On Fri, Dec 6, 2024 at 10:33 AM Tomi Valkeinen
<tomi.valkeinen@...asonboard.com> wrote:
> From: Tomi Valkeinen <tomi.valkeinen+renesas@...asonboard.com>
>
> Add display related clocks for DU, DSI, FCPVD, and VSPD.
>
> Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@...asonboard.com>
> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@...asonboard.com>
> Tested-by: Geert Uytterhoeven <geert+renesas@...der.be>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
i.e. will queue in renesas-clk for v6.14.
> --- a/drivers/clk/renesas/r8a779h0-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a779h0-cpg-mssr.c
> @@ -179,6 +179,9 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] __initconst = {
> DEF_MOD("canfd0", 328, R8A779H0_CLK_SASYNCPERD2),
> DEF_MOD("csi40", 331, R8A779H0_CLK_CSI),
> DEF_MOD("csi41", 400, R8A779H0_CLK_CSI),
> + DEF_MOD("dis0", 411, R8A779H0_CLK_S0D3),
> + DEF_MOD("dsitxlink0", 415, R8A779H0_CLK_DSIREF),
> + DEF_MOD("fcpvd0", 508, R8A779H0_CLK_S0D3),
> DEF_MOD("hscif0", 514, R8A779H0_CLK_SASYNCPERD1),
> DEF_MOD("hscif1", 515, R8A779H0_CLK_SASYNCPERD1),
> DEF_MOD("hscif2", 516, R8A779H0_CLK_SASYNCPERD1),
> @@ -227,6 +230,7 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] __initconst = {
> DEF_MOD("vin15", 811, R8A779H0_CLK_S0D4_VIO),
> DEF_MOD("vin16", 812, R8A779H0_CLK_S0D4_VIO),
> DEF_MOD("vin17", 813, R8A779H0_CLK_S0D4_VIO),
> + DEF_MOD("vspd0", 830, R8A779H0_CLK_S0D1_VIO),
> DEF_MOD("wdt1:wdt0", 907, R8A779H0_CLK_R),
> DEF_MOD("cmt0", 910, R8A779H0_CLK_R),
> DEF_MOD("cmt1", 911, R8A779H0_CLK_R),
As mentioned by Laurent during his review on v1, all clock parents
should probably be some form of R8A779H0_CLK_S0Dx_VIO.
So I'm inclined to replace all of them by R8A779H0_CLK_VIOBUSD2 while
applying, which would match R-Car V4H.
Are you OK with that?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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