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Message-ID: <CALHCpMg_CEUKGVXnkJbwcDEUNzq_N1Cac=Umjra=KL6vEpLcsg@mail.gmail.com>
Date: Sat, 7 Dec 2024 18:36:06 +0300
From: Maxim Kiselev <bigunclemax@...il.com>
To: Drew Fustini <drew@...7.com>
Cc: Emil Renner Berthing <emil.renner.berthing@...onical.com>, Guo Ren <guoren@...nel.org>, 
	Fu Wei <wefu@...hat.com>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>, 
	Albert Ou <aou@...s.berkeley.edu>, linux-riscv@...ts.infradead.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1] riscv: dts: thead: Fix TH1520 emmc and shdci clock rate

Hi Emil, Drew

> Did you look into the documentation

Yes, I looked into th1520 user manual but found only
mention of emmc sdio ref clk which is 792Mhz.

> That is a good point about checking the thead vendor kernel.

Drew, thanks for the suggestion to look at Revy's BSP.
I'll make a patch for the clk controller in v2.

Best wishes,
Maksim

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