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Message-Id: <173367736385.1042266.3592021837823660516.b4-ty@kernel.org>
Date: Sun, 08 Dec 2024 22:32:43 +0530
From: Vinod Koul <vkoul@...nel.org>
To: kishon@...nel.org, robh+dt@...nel.org, manivannan.sadhasivam@...aro.org,
bhelgaas@...gle.com, kw@...ux.com, lpieralisi@...nel.org,
quic_qianyu@...cinc.com, conor+dt@...nel.org, neil.armstrong@...aro.org,
andersson@...nel.org, konradybcio@...nel.org,
Ziyue Zhang <quic_ziyuzhan@...cinc.com>
Cc: quic_tsoni@...cinc.com, quic_shashim@...cinc.com,
quic_kaushalk@...cinc.com, quic_tdas@...cinc.com, quic_tingweiz@...cinc.com,
quic_aiquny@...cinc.com, kernel@...cinc.com, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-phy@...ts.infradead.org,
Krishna chaitanya chundru <quic_krichai@...cinc.com>
Subject: Re: (subset) [PATCH v2 0/6] pci: qcom: Add QCS615 PCIe support
On Fri, 22 Nov 2024 10:33:08 +0800, Ziyue Zhang wrote:
> This series adds document, phy, configs support for PCIe in QCS615.
> The series depend on the following devicetree and smmu.
>
> Base DT:
> https://lore.kernel.org/all/20241104-add_initial_support_for_qcs615-v5-0-9dde8d7b80b0@quicinc.com/
>
> APPS SMMU:
> https://lore.kernel.org/all/20241105032107.9552-1-quic_qqzhou@quicinc.com/
>
> [...]
Applied, thanks!
[1/6] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the QCS615 QMP PCIe PHY Gen3 x1
commit: 1e889f2bd8373229ce48be5860b8383e75393e13
[2/6] phy: qcom: qmp: Add phy register and clk setting for QCS615 PCIe
commit: 21364b0fe378646fa301f29f714140a1f465561b
Best regards,
--
~Vinod
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