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Message-ID: <20241208002105.18074-5-ansuelsmth@gmail.com>
Date: Sun, 8 Dec 2024 01:20:39 +0100
From: Christian Marangi <ansuelsmth@...il.com>
To: Christian Marangi <ansuelsmth@...il.com>,
Lee Jones <lee@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Andrew Lunn <andrew+netdev@...n.ch>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Vladimir Oltean <olteanv@...il.com>,
Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org,
netdev@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
upstream@...oha.com
Subject: [net-next PATCH v10 4/9] dt-bindings: mfd: Document support for Airoha AN8855 Switch SoC
Document support for Airoha AN8855 Switch SoC. This SoC expose various
peripherals like an Ethernet Switch, a NVMEM provider and Ethernet PHYs.
It does also support i2c and timers but those are not currently
supported/used.
Signed-off-by: Christian Marangi <ansuelsmth@...il.com>
---
.../bindings/mfd/airoha,an8855-mfd.yaml | 185 ++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 186 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mfd/airoha,an8855-mfd.yaml
diff --git a/Documentation/devicetree/bindings/mfd/airoha,an8855-mfd.yaml b/Documentation/devicetree/bindings/mfd/airoha,an8855-mfd.yaml
new file mode 100644
index 000000000000..5d1ed5e7a52a
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/airoha,an8855-mfd.yaml
@@ -0,0 +1,185 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/airoha,an8855-mfd.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Airoha AN8855 Switch SoC
+
+maintainers:
+ - Christian Marangi <ansuelsmth@...il.com>
+
+description: >
+ Airoha AN8855 Switch is a SoC that expose various peripherals like an
+ Ethernet Switch, a NVMEM provider and Ethernet PHYs.
+
+ It does also support i2c and timers but those are not currently
+ supported/used.
+
+properties:
+ compatible:
+ const: airoha,an8855-mfd
+
+ reg:
+ minItems: 1
+ maxItems: 5
+
+ reg-names:
+ minItems: 1
+ maxItems: 5
+
+ efuse:
+ type: object
+ $ref: /schemas/nvmem/airoha,an8855-efuse.yaml
+ description:
+ EFUSE exposed by the Airoha AN8855 Switch. This child node definition
+ should follow the bindings specified in
+ Documentation/devicetree/bindings/nvmem/airoha,an8855-efuse.yaml
+
+ ethernet-switch:
+ type: object
+ $ref: /schemas/net/dsa/airoha,an8855-switch.yaml
+ description:
+ Switch exposed by the Airoha AN8855 Switch. This child node definition
+ should follow the bindings specified in
+ Documentation/devicetree/bindings/net/dsa/airoha,an8855-switch.yaml
+
+ mdio:
+ type: object
+ $ref: /schemas/net/airoha,an8855-mdio.yaml
+ description:
+ MDIO exposed by the Airoha AN8855 Switch. This child node definition
+ should follow the bindings specified in
+ Documentation/devicetree/bindings/net/airoha,an8855-mdio.yaml
+
+required:
+ - compatible
+ - reg
+ - reg-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mfd@1 {
+ compatible = "airoha,an8855-mfd";
+ reg = <1>, <2>;
+ reg-names = "phy0", "phy1";
+
+ efuse {
+ compatible = "airoha,an8855-efuse";
+
+ #nvmem-cell-cells = <0>;
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ shift_sel_port0_tx_a: shift-sel-port0-tx-a@c {
+ reg = <0xc 0x4>;
+ };
+
+ shift_sel_port0_tx_b: shift-sel-port0-tx-b@10 {
+ reg = <0x10 0x4>;
+ };
+
+ shift_sel_port0_tx_c: shift-sel-port0-tx-c@14 {
+ reg = <0x14 0x4>;
+ };
+
+ shift_sel_port0_tx_d: shift-sel-port0-tx-d@18 {
+ reg = <0x18 0x4>;
+ };
+
+ shift_sel_port1_tx_a: shift-sel-port1-tx-a@1c {
+ reg = <0x1c 0x4>;
+ };
+
+ shift_sel_port1_tx_b: shift-sel-port1-tx-b@20 {
+ reg = <0x20 0x4>;
+ };
+
+ shift_sel_port1_tx_c: shift-sel-port1-tx-c@24 {
+ reg = <0x24 0x4>;
+ };
+
+ shift_sel_port1_tx_d: shift-sel-port1-tx-d@28 {
+ reg = <0x28 0x4>;
+ };
+ };
+ };
+
+ ethernet-switch {
+ compatible = "airoha,an8855-switch";
+
+ reset-gpios = <&pio 39 0>;
+
+ airoha,ext-surge;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "lan1";
+ phy-mode = "internal";
+ phy-handle = <&internal_phy1>;
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan2";
+ phy-mode = "internal";
+ phy-handle = <&internal_phy2>;
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+ };
+ };
+
+ mdio {
+ compatible = "airoha,an8855-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ internal_phy1: phy@1 {
+ reg = <1>;
+
+ nvmem-cells = <&shift_sel_port0_tx_a>,
+ <&shift_sel_port0_tx_b>,
+ <&shift_sel_port0_tx_c>,
+ <&shift_sel_port0_tx_d>;
+ nvmem-cell-names = "tx_a", "tx_b", "tx_c", "tx_d";
+ };
+
+ internal_phy2: phy@2 {
+ reg = <2>;
+
+ nvmem-cells = <&shift_sel_port1_tx_a>,
+ <&shift_sel_port1_tx_b>,
+ <&shift_sel_port1_tx_c>,
+ <&shift_sel_port1_tx_d>;
+ nvmem-cell-names = "tx_a", "tx_b", "tx_c", "tx_d";
+ };
+ };
+ };
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index fd37e829fab5..f3e3f6938824 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -717,6 +717,7 @@ L: linux-arm-kernel@...ts.infradead.org (moderated for non-subscribers)
L: linux-mediatek@...ts.infradead.org (moderated for non-subscribers)
L: netdev@...r.kernel.org
S: Maintained
+F: Documentation/devicetree/bindings/mfd/airoha,an8855-mfd.yaml
F: Documentation/devicetree/bindings/net/airoha,an8855-mdio.yaml
F: Documentation/devicetree/bindings/net/dsa/airoha,an8855-switch.yaml
F: Documentation/devicetree/bindings/nvmem/airoha,an8855-efuse.yaml
--
2.45.2
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